xref: /linux/drivers/gpu/drm/panel/panel-ilitek-ili9341.c (revision 3fd6c59042dbba50391e30862beac979491145fe)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Ilitek ILI9341 TFT LCD drm_panel driver.
4  *
5  * This panel can be configured to support:
6  * - 16-bit parallel RGB interface
7  * - 18-bit parallel RGB interface
8  * - 4-line serial spi interface
9  *
10  * Copyright (C) 2021 Dillon Min <dillon.minfei@gmail.com>
11  *
12  * For dbi+dpi part:
13  * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
14  * the reuse of DBI abstraction part referred from Linus's patch
15  * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
16  */
17 
18 #include <linux/backlight.h>
19 #include <linux/bitops.h>
20 #include <linux/delay.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/mod_devicetable.h>
23 #include <linux/module.h>
24 #include <linux/property.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/spi/spi.h>
27 
28 #include <video/mipi_display.h>
29 
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_drv.h>
32 #include <drm/drm_fbdev_dma.h>
33 #include <drm/drm_gem_atomic_helper.h>
34 #include <drm/drm_gem_dma_helper.h>
35 #include <drm/drm_gem_framebuffer_helper.h>
36 #include <drm/drm_mipi_dbi.h>
37 #include <drm/drm_modes.h>
38 #include <drm/drm_panel.h>
39 #include <drm/drm_print.h>
40 
41 #define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
42 #define ILI9341_FRC            0xb1   /* Frame Rate Control register */
43 #define ILI9341_DFC            0xb6   /* Display Function Control register */
44 #define ILI9341_POWER1         0xc0   /* Power Control 1 register */
45 #define ILI9341_POWER2         0xc1   /* Power Control 2 register */
46 #define ILI9341_VCOM1          0xc5   /* VCOM Control 1 register */
47 #define ILI9341_VCOM2          0xc7   /* VCOM Control 2 register */
48 #define ILI9341_POWERA         0xcb   /* Power control A register */
49 #define ILI9341_POWERB         0xcf   /* Power control B register */
50 #define ILI9341_PGAMMA         0xe0   /* Positive Gamma Correction register */
51 #define ILI9341_NGAMMA         0xe1   /* Negative Gamma Correction register */
52 #define ILI9341_DTCA           0xe8   /* Driver timing control A */
53 #define ILI9341_DTCB           0xea   /* Driver timing control B */
54 #define ILI9341_POWER_SEQ      0xed   /* Power on sequence register */
55 #define ILI9341_3GAMMA_EN      0xf2   /* 3 Gamma enable register */
56 #define ILI9341_INTERFACE      0xf6   /* Interface control register */
57 #define ILI9341_PRC            0xf7   /* Pump ratio control register */
58 #define ILI9341_ETMOD	       0xb7   /* Entry mode set */
59 
60 #define ILI9341_MADCTL_BGR	BIT(3)
61 #define ILI9341_MADCTL_MV	BIT(5)
62 #define ILI9341_MADCTL_MX	BIT(6)
63 #define ILI9341_MADCTL_MY	BIT(7)
64 
65 #define ILI9341_POWER_B_LEN	3
66 #define ILI9341_POWER_SEQ_LEN	4
67 #define ILI9341_DTCA_LEN	3
68 #define ILI9341_DTCB_LEN	2
69 #define ILI9341_POWER_A_LEN	5
70 #define ILI9341_DFC_1_LEN	2
71 #define ILI9341_FRC_LEN		2
72 #define ILI9341_VCOM_1_LEN	2
73 #define ILI9341_DFC_2_LEN	4
74 #define ILI9341_COLUMN_ADDR_LEN	4
75 #define ILI9341_PAGE_ADDR_LEN	4
76 #define ILI9341_INTERFACE_LEN	3
77 #define ILI9341_PGAMMA_LEN	15
78 #define ILI9341_NGAMMA_LEN	15
79 #define ILI9341_CA_LEN		3
80 
81 #define ILI9341_PIXEL_DPI_16_BITS	(BIT(6) | BIT(4))
82 #define ILI9341_PIXEL_DPI_18_BITS	(BIT(6) | BIT(5))
83 #define ILI9341_GAMMA_CURVE_1		BIT(0)
84 #define ILI9341_IF_WE_MODE		BIT(0)
85 #define ILI9341_IF_BIG_ENDIAN		0x00
86 #define ILI9341_IF_DM_RGB		BIT(2)
87 #define ILI9341_IF_DM_INTERNAL		0x00
88 #define ILI9341_IF_DM_VSYNC		BIT(3)
89 #define ILI9341_IF_RM_RGB		BIT(1)
90 #define ILI9341_IF_RIM_RGB		0x00
91 
92 #define ILI9341_COLUMN_ADDR		0x00ef
93 #define ILI9341_PAGE_ADDR		0x013f
94 
95 #define ILI9341_RGB_EPL			BIT(0)
96 #define ILI9341_RGB_DPL			BIT(1)
97 #define ILI9341_RGB_HSPL		BIT(2)
98 #define ILI9341_RGB_VSPL		BIT(3)
99 #define ILI9341_RGB_DE_MODE		BIT(6)
100 #define ILI9341_RGB_DISP_PATH_MEM	BIT(7)
101 
102 #define ILI9341_DBI_VCOMH_4P6V		0x23
103 #define ILI9341_DBI_PWR_2_DEFAULT	0x10
104 #define ILI9341_DBI_PRC_NORMAL		0x20
105 #define ILI9341_DBI_VCOM_1_VMH_4P25V	0x3e
106 #define ILI9341_DBI_VCOM_1_VML_1P5V	0x28
107 #define ILI9341_DBI_VCOM_2_DEC_58	0x86
108 #define ILI9341_DBI_FRC_DIVA		0x00
109 #define ILI9341_DBI_FRC_RTNA		0x1b
110 #define ILI9341_DBI_EMS_GAS		BIT(0)
111 #define ILI9341_DBI_EMS_DTS		BIT(1)
112 #define ILI9341_DBI_EMS_GON		BIT(2)
113 
114 /* struct ili9341_config - the system specific ILI9341 configuration */
115 struct ili9341_config {
116 	u32 max_spi_speed;
117 	/* mode: the drm display mode */
118 	const struct drm_display_mode mode;
119 	/* ca: TODO: need comments for this register */
120 	u8 ca[ILI9341_CA_LEN];
121 	/* power_b: Power control B (CFh) */
122 	u8 power_b[ILI9341_POWER_B_LEN];
123 	/* power_seq: Power on sequence control (EDh) */
124 	u8 power_seq[ILI9341_POWER_SEQ_LEN];
125 	/* dtca: Driver timing control A (E8h) */
126 	u8 dtca[ILI9341_DTCA_LEN];
127 	/* dtcb: Driver timing control B (EAh) */
128 	u8 dtcb[ILI9341_DTCB_LEN];
129 	/* power_a: Power control A (CBh) */
130 	u8 power_a[ILI9341_POWER_A_LEN];
131 	/* frc: Frame Rate Control (In Normal Mode/Full Colors) (B1h) */
132 	u8 frc[ILI9341_FRC_LEN];
133 	/* prc: Pump ratio control (F7h) */
134 	u8 prc;
135 	/* dfc_1: B6h DISCTRL (Display Function Control) */
136 	u8 dfc_1[ILI9341_DFC_1_LEN];
137 	/* power_1: Power Control 1 (C0h) */
138 	u8 power_1;
139 	/* power_2: Power Control 2 (C1h) */
140 	u8 power_2;
141 	/* vcom_1: VCOM Control 1(C5h) */
142 	u8 vcom_1[ILI9341_VCOM_1_LEN];
143 	/* vcom_2: VCOM Control 2(C7h) */
144 	u8 vcom_2;
145 	/* address_mode: Memory Access Control (36h) */
146 	u8 address_mode;
147 	/* g3amma_en: Enable 3G (F2h) */
148 	u8 g3amma_en;
149 	/* rgb_interface: RGB Interface Signal Control (B0h) */
150 	u8 rgb_interface;
151 	/* dfc_2: refer to dfc_1 */
152 	u8 dfc_2[ILI9341_DFC_2_LEN];
153 	/* column_addr: Column Address Set (2Ah) */
154 	u8 column_addr[ILI9341_COLUMN_ADDR_LEN];
155 	/* page_addr: Page Address Set (2Bh) */
156 	u8 page_addr[ILI9341_PAGE_ADDR_LEN];
157 	/* interface: Interface Control (F6h) */
158 	u8 interface[ILI9341_INTERFACE_LEN];
159 	/*
160 	 * pixel_format: This command sets the pixel format for the RGB
161 	 * image data used by
162 	 */
163 	u8 pixel_format;
164 	/*
165 	 * gamma_curve: This command is used to select the desired Gamma
166 	 * curve for the
167 	 */
168 	u8 gamma_curve;
169 	/* pgamma: Positive Gamma Correction (E0h) */
170 	u8 pgamma[ILI9341_PGAMMA_LEN];
171 	/* ngamma: Negative Gamma Correction (E1h) */
172 	u8 ngamma[ILI9341_NGAMMA_LEN];
173 };
174 
175 struct ili9341 {
176 	struct device *dev;
177 	const struct ili9341_config *conf;
178 	struct drm_panel panel;
179 	struct gpio_desc *reset_gpio;
180 	struct gpio_desc *dc_gpio;
181 	struct mipi_dbi *dbi;
182 	u32 max_spi_speed;
183 	struct regulator_bulk_data supplies[3];
184 };
185 
186 /*
187  * The Stm32f429-disco board has a panel ili9341 connected to ltdc controller
188  */
189 static const struct ili9341_config ili9341_stm32f429_disco_data = {
190 	.max_spi_speed = 10000000,
191 	.mode = {
192 		.clock = 6100,
193 		.hdisplay = 240,
194 		.hsync_start = 240 + 10,/* hfp 10 */
195 		.hsync_end = 240 + 10 + 10,/* hsync 10 */
196 		.htotal = 240 + 10 + 10 + 20,/* hbp 20 */
197 		.vdisplay = 320,
198 		.vsync_start = 320 + 4,/* vfp 4 */
199 		.vsync_end = 320 + 4 + 2,/* vsync 2 */
200 		.vtotal = 320 + 4 + 2 + 2,/* vbp 2 */
201 		.flags = 0,
202 		.width_mm = 65,
203 		.height_mm = 50,
204 		.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
205 	},
206 	.ca = {0xc3, 0x08, 0x50},
207 	.power_b = {0x00, 0xc1, 0x30},
208 	.power_seq = {0x64, 0x03, 0x12, 0x81},
209 	.dtca = {0x85, 0x00, 0x78},
210 	.power_a = {0x39, 0x2c, 0x00, 0x34, 0x02},
211 	.prc = 0x20,
212 	.dtcb = {0x00, 0x00},
213 	/* 0x00 fosc, 0x1b 70hz */
214 	.frc = {0x00, 0x1b},
215 	/*
216 	 * 0x0a Interval scan, AGND AGND AGND AGND
217 	 * 0xa2 Normally white, G1 -> G320, S720 -> S1,
218 	 *	Scan Cycle 5 frames,85ms
219 	 */
220 	.dfc_1 = {0x0a, 0xa2},
221 	/* 0x10 3.65v */
222 	.power_1 = 0x10,
223 	/* 0x10 AVDD=vci*2, VGH=vci*7, VGL=-vci*4 */
224 	.power_2 = 0x10,
225 	/* 0x45 VCOMH 4.425v, 0x15 VCOML -1.975*/
226 	.vcom_1 = {0x45, 0x15},
227 	/* 0x90 offset voltage, VMH-48, VML-48 */
228 	.vcom_2 = 0x90,
229 	/*
230 	 * 0xc8 Row Address Order, Column Address Order
231 	 * BGR 1
232 	 */
233 	.address_mode = 0xc8,
234 	.g3amma_en = 0x00,
235 	/*
236 	 * 0xc2
237 	 * Display Data Path: Memory
238 	 * RGB: DE mode
239 	 * DOTCLK polarity set (data fetched at the falling time)
240 	 */
241 	.rgb_interface = ILI9341_RGB_DISP_PATH_MEM |
242 			ILI9341_RGB_DE_MODE |
243 			ILI9341_RGB_DPL,
244 	/*
245 	 * 0x0a
246 	 * Gate outputs in non-display area: Interval scan
247 	 * Determine source/VCOM output in a non-display area in the partial
248 	 * display mode: AGND AGND AGND AGND
249 	 *
250 	 * 0xa7
251 	 * Scan Cycle: 15 frames
252 	 * fFLM = 60Hz: 255ms
253 	 * Liquid crystal type: Normally white
254 	 * Gate Output Scan Direction: G1 -> G320
255 	 * Source Output Scan Direction: S720 -> S1
256 	 *
257 	 * 0x27
258 	 * LCD Driver Line: 320 lines
259 	 *
260 	 * 0x04
261 	 * PCDIV: 4
262 	 */
263 	.dfc_2 = {0x0a, 0xa7, 0x27, 0x04},
264 	/* column address: 240 */
265 	.column_addr = {0x00, 0x00, (ILI9341_COLUMN_ADDR >> 4) & 0xff,
266 				ILI9341_COLUMN_ADDR & 0xff},
267 	/* page address: 320 */
268 	.page_addr = {0x00, 0x00, (ILI9341_PAGE_ADDR >> 4) & 0xff,
269 				ILI9341_PAGE_ADDR & 0xff},
270 	/*
271 	 * Memory write control: When the transfer number of data exceeds
272 	 * (EC-SC+1)*(EP-SP+1), the column and page number will be
273 	 * reset, and the exceeding data will be written into the following
274 	 * column and page.
275 	 * Display Operation Mode: RGB Interface Mode
276 	 * Interface for RAM Access: RGB interface
277 	 * 16- bit RGB interface (1 transfer/pixel)
278 	 */
279 	.interface = {ILI9341_IF_WE_MODE, 0x00,
280 			ILI9341_IF_DM_RGB | ILI9341_IF_RM_RGB},
281 	/* DPI: 16 bits / pixel */
282 	.pixel_format = ILI9341_PIXEL_DPI_16_BITS,
283 	/* Curve Selected: Gamma curve 1 (G2.2) */
284 	.gamma_curve = ILI9341_GAMMA_CURVE_1,
285 	.pgamma = {0x0f, 0x29, 0x24, 0x0c, 0x0e,
286 			0x09, 0x4e, 0x78, 0x3c, 0x09,
287 			0x13, 0x05, 0x17, 0x11, 0x00},
288 	.ngamma = {0x00, 0x16, 0x1b, 0x04, 0x11,
289 			0x07, 0x31, 0x33, 0x42, 0x05,
290 			0x0c, 0x0a, 0x28, 0x2f, 0x0f},
291 };
292 
panel_to_ili9341(struct drm_panel * panel)293 static inline struct ili9341 *panel_to_ili9341(struct drm_panel *panel)
294 {
295 	return container_of(panel, struct ili9341, panel);
296 }
297 
ili9341_dpi_init(struct ili9341 * ili)298 static void ili9341_dpi_init(struct ili9341 *ili)
299 {
300 	struct device *dev = (&ili->panel)->dev;
301 	struct mipi_dbi *dbi = ili->dbi;
302 	struct ili9341_config *cfg = (struct ili9341_config *)ili->conf;
303 
304 	/* Power Control */
305 	mipi_dbi_command_stackbuf(dbi, 0xca, cfg->ca, ILI9341_CA_LEN);
306 	mipi_dbi_command_stackbuf(dbi, ILI9341_POWERB, cfg->power_b,
307 				  ILI9341_POWER_B_LEN);
308 	mipi_dbi_command_stackbuf(dbi, ILI9341_POWER_SEQ, cfg->power_seq,
309 				  ILI9341_POWER_SEQ_LEN);
310 	mipi_dbi_command_stackbuf(dbi, ILI9341_DTCA, cfg->dtca,
311 				  ILI9341_DTCA_LEN);
312 	mipi_dbi_command_stackbuf(dbi, ILI9341_POWERA, cfg->power_a,
313 				  ILI9341_POWER_A_LEN);
314 	mipi_dbi_command(ili->dbi, ILI9341_PRC, cfg->prc);
315 	mipi_dbi_command_stackbuf(dbi, ILI9341_DTCB, cfg->dtcb,
316 				  ILI9341_DTCB_LEN);
317 	mipi_dbi_command_stackbuf(dbi, ILI9341_FRC, cfg->frc, ILI9341_FRC_LEN);
318 	mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_1,
319 				  ILI9341_DFC_1_LEN);
320 	mipi_dbi_command(dbi, ILI9341_POWER1, cfg->power_1);
321 	mipi_dbi_command(dbi, ILI9341_POWER2, cfg->power_2);
322 
323 	/* VCOM */
324 	mipi_dbi_command_stackbuf(dbi, ILI9341_VCOM1, cfg->vcom_1,
325 				  ILI9341_VCOM_1_LEN);
326 	mipi_dbi_command(dbi, ILI9341_VCOM2, cfg->vcom_2);
327 	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, cfg->address_mode);
328 
329 	/* Gamma */
330 	mipi_dbi_command(dbi, ILI9341_3GAMMA_EN, cfg->g3amma_en);
331 	mipi_dbi_command(dbi, ILI9341_RGB_INTERFACE, cfg->rgb_interface);
332 	mipi_dbi_command_stackbuf(dbi, ILI9341_DFC, cfg->dfc_2,
333 				  ILI9341_DFC_2_LEN);
334 
335 	/* Colomn address set */
336 	mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_COLUMN_ADDRESS,
337 				  cfg->column_addr, ILI9341_COLUMN_ADDR_LEN);
338 
339 	/* Page address set */
340 	mipi_dbi_command_stackbuf(dbi, MIPI_DCS_SET_PAGE_ADDRESS,
341 				  cfg->page_addr, ILI9341_PAGE_ADDR_LEN);
342 	mipi_dbi_command_stackbuf(dbi, ILI9341_INTERFACE, cfg->interface,
343 				  ILI9341_INTERFACE_LEN);
344 
345 	/* Format */
346 	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, cfg->pixel_format);
347 	mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
348 	msleep(200);
349 	mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, cfg->gamma_curve);
350 	mipi_dbi_command_stackbuf(dbi, ILI9341_PGAMMA, cfg->pgamma,
351 				  ILI9341_PGAMMA_LEN);
352 	mipi_dbi_command_stackbuf(dbi, ILI9341_NGAMMA, cfg->ngamma,
353 				  ILI9341_NGAMMA_LEN);
354 	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
355 	msleep(200);
356 	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
357 	mipi_dbi_command(dbi, MIPI_DCS_WRITE_MEMORY_START);
358 
359 	dev_info(dev, "Initialized display rgb interface\n");
360 }
361 
ili9341_dpi_power_on(struct ili9341 * ili)362 static int ili9341_dpi_power_on(struct ili9341 *ili)
363 {
364 	struct device *dev = (&ili->panel)->dev;
365 	int ret = 0;
366 
367 	/* Assert RESET */
368 	gpiod_set_value(ili->reset_gpio, 1);
369 
370 	/* Enable power */
371 	ret = regulator_bulk_enable(ARRAY_SIZE(ili->supplies),
372 				    ili->supplies);
373 	if (ret < 0) {
374 		dev_err(dev, "unable to enable vcc\n");
375 		return ret;
376 	}
377 	msleep(20);
378 
379 	/* De-assert RESET */
380 	gpiod_set_value(ili->reset_gpio, 0);
381 	msleep(20);
382 
383 	return 0;
384 }
385 
ili9341_dpi_power_off(struct ili9341 * ili)386 static int ili9341_dpi_power_off(struct ili9341 *ili)
387 {
388 	/* Assert RESET */
389 	gpiod_set_value(ili->reset_gpio, 1);
390 
391 	/* Disable power */
392 	return regulator_bulk_disable(ARRAY_SIZE(ili->supplies),
393 				      ili->supplies);
394 }
395 
ili9341_dpi_disable(struct drm_panel * panel)396 static int ili9341_dpi_disable(struct drm_panel *panel)
397 {
398 	struct ili9341 *ili = panel_to_ili9341(panel);
399 
400 	mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_OFF);
401 	return 0;
402 }
403 
ili9341_dpi_unprepare(struct drm_panel * panel)404 static int ili9341_dpi_unprepare(struct drm_panel *panel)
405 {
406 	struct ili9341 *ili = panel_to_ili9341(panel);
407 
408 	return ili9341_dpi_power_off(ili);
409 }
410 
ili9341_dpi_prepare(struct drm_panel * panel)411 static int ili9341_dpi_prepare(struct drm_panel *panel)
412 {
413 	struct ili9341 *ili = panel_to_ili9341(panel);
414 	int ret;
415 
416 	ret = ili9341_dpi_power_on(ili);
417 	if (ret < 0)
418 		return ret;
419 
420 	ili9341_dpi_init(ili);
421 
422 	return 0;
423 }
424 
ili9341_dpi_enable(struct drm_panel * panel)425 static int ili9341_dpi_enable(struct drm_panel *panel)
426 {
427 	struct ili9341 *ili = panel_to_ili9341(panel);
428 
429 	mipi_dbi_command(ili->dbi, MIPI_DCS_SET_DISPLAY_ON);
430 	return 0;
431 }
432 
ili9341_dpi_get_modes(struct drm_panel * panel,struct drm_connector * connector)433 static int ili9341_dpi_get_modes(struct drm_panel *panel,
434 				 struct drm_connector *connector)
435 {
436 	struct ili9341 *ili = panel_to_ili9341(panel);
437 	struct drm_device *drm = connector->dev;
438 	struct drm_display_mode *mode;
439 	struct drm_display_info *info;
440 
441 	info = &connector->display_info;
442 	info->width_mm = ili->conf->mode.width_mm;
443 	info->height_mm = ili->conf->mode.height_mm;
444 
445 	if (ili->conf->rgb_interface & ILI9341_RGB_DPL)
446 		info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
447 	else
448 		info->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
449 
450 	if (ili->conf->rgb_interface & ILI9341_RGB_EPL)
451 		info->bus_flags |= DRM_BUS_FLAG_DE_LOW;
452 	else
453 		info->bus_flags |= DRM_BUS_FLAG_DE_HIGH;
454 
455 	mode = drm_mode_duplicate(drm, &ili->conf->mode);
456 	if (!mode) {
457 		drm_err(drm, "bad mode or failed to add mode\n");
458 		return -EINVAL;
459 	}
460 	drm_mode_set_name(mode);
461 
462 	/* Set up the polarity */
463 	if (ili->conf->rgb_interface & ILI9341_RGB_HSPL)
464 		mode->flags |= DRM_MODE_FLAG_PHSYNC;
465 	else
466 		mode->flags |= DRM_MODE_FLAG_NHSYNC;
467 
468 	if (ili->conf->rgb_interface & ILI9341_RGB_VSPL)
469 		mode->flags |= DRM_MODE_FLAG_PVSYNC;
470 	else
471 		mode->flags |= DRM_MODE_FLAG_NVSYNC;
472 
473 	drm_mode_probed_add(connector, mode);
474 
475 	return 1; /* Number of modes */
476 }
477 
478 static const struct drm_panel_funcs ili9341_dpi_funcs = {
479 	.disable = ili9341_dpi_disable,
480 	.unprepare = ili9341_dpi_unprepare,
481 	.prepare = ili9341_dpi_prepare,
482 	.enable = ili9341_dpi_enable,
483 	.get_modes = ili9341_dpi_get_modes,
484 };
485 
ili9341_dpi_probe(struct spi_device * spi,struct gpio_desc * dc,struct gpio_desc * reset)486 static int ili9341_dpi_probe(struct spi_device *spi, struct gpio_desc *dc,
487 			     struct gpio_desc *reset)
488 {
489 	struct device *dev = &spi->dev;
490 	struct ili9341 *ili;
491 	int ret;
492 
493 	ili = devm_kzalloc(dev, sizeof(struct ili9341), GFP_KERNEL);
494 	if (!ili)
495 		return -ENOMEM;
496 
497 	ili->dbi = devm_kzalloc(dev, sizeof(struct mipi_dbi),
498 				GFP_KERNEL);
499 	if (!ili->dbi)
500 		return -ENOMEM;
501 
502 	ili->supplies[0].supply = "vci";
503 	ili->supplies[1].supply = "vddi";
504 	ili->supplies[2].supply = "vddi-led";
505 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ili->supplies),
506 				      ili->supplies);
507 	if (ret < 0) {
508 		dev_err(dev, "failed to get regulators: %d\n", ret);
509 		return ret;
510 	}
511 
512 	ret = mipi_dbi_spi_init(spi, ili->dbi, dc);
513 	if (ret)
514 		return ret;
515 
516 	spi_set_drvdata(spi, ili);
517 	ili->reset_gpio = reset;
518 	/*
519 	 * Every new incarnation of this display must have a unique
520 	 * data entry for the system in this driver.
521 	 */
522 	ili->conf = device_get_match_data(dev);
523 	if (!ili->conf) {
524 		dev_err(dev, "missing device configuration\n");
525 		return -ENODEV;
526 	}
527 
528 	ili->max_spi_speed = ili->conf->max_spi_speed;
529 	drm_panel_init(&ili->panel, dev, &ili9341_dpi_funcs,
530 		       DRM_MODE_CONNECTOR_DPI);
531 	drm_panel_add(&ili->panel);
532 
533 	return 0;
534 }
535 
ili9341_probe(struct spi_device * spi)536 static int ili9341_probe(struct spi_device *spi)
537 {
538 	struct device *dev = &spi->dev;
539 	struct gpio_desc *dc;
540 	struct gpio_desc *reset;
541 
542 	reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
543 	if (IS_ERR(reset))
544 		return dev_err_probe(dev, PTR_ERR(reset), "Failed to get gpio 'reset'\n");
545 
546 	dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
547 	if (IS_ERR(dc))
548 		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\n");
549 
550 	return ili9341_dpi_probe(spi, dc, reset);
551 }
552 
ili9341_remove(struct spi_device * spi)553 static void ili9341_remove(struct spi_device *spi)
554 {
555 	struct ili9341 *ili = spi_get_drvdata(spi);
556 
557 	ili9341_dpi_power_off(ili);
558 	drm_panel_remove(&ili->panel);
559 }
560 
561 static const struct of_device_id ili9341_of_match[] = {
562 	{
563 		.compatible = "st,sf-tc240t-9370-t",
564 		.data = &ili9341_stm32f429_disco_data,
565 	},
566 	{ }
567 };
568 MODULE_DEVICE_TABLE(of, ili9341_of_match);
569 
570 static const struct spi_device_id ili9341_id[] = {
571 	{ "sf-tc240t-9370-t", 0 },
572 	{ }
573 };
574 MODULE_DEVICE_TABLE(spi, ili9341_id);
575 
576 static struct spi_driver ili9341_driver = {
577 	.probe = ili9341_probe,
578 	.remove = ili9341_remove,
579 	.id_table = ili9341_id,
580 	.driver = {
581 		.name = "panel-ilitek-ili9341",
582 		.of_match_table = ili9341_of_match,
583 	},
584 };
585 module_spi_driver(ili9341_driver);
586 
587 MODULE_AUTHOR("Dillon Min <dillon.minfei@gmail.com>");
588 MODULE_DESCRIPTION("ILI9341 LCD panel driver");
589 MODULE_LICENSE("GPL v2");
590