Searched refs:HDMI_CON2 (Results 1 – 1 of 1) sorted by relevance
23 #define HDMI_CON2 0x08 macro58 mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS); in mtk_hdmi_pll_prepare()61 mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO); in mtk_hdmi_pll_prepare()64 mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN); in mtk_hdmi_pll_prepare()80 mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_MBIAS_LPF_EN); in mtk_hdmi_pll_unprepare()83 mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_CKLDO); in mtk_hdmi_pll_unprepare()86 mtk_phy_clear_bits(base + HDMI_CON2, RG_HDMITX_EN_MBIAS); in mtk_hdmi_pll_unprepare()109 mtk_phy_set_bits(base + HDMI_CON2, RG_HDMITX_EN_TX_POSDIV); in mtk_hdmi_pll_set_rate()112 mtk_phy_update_field(base + HDMI_CON2, RG_HDMITX_TX_POSDIV_MASK, pos_div); in mtk_hdmi_pll_set_rate()153 tmp = readl(hdmi_phy->regs + HDMI_CON2); in mtk_hdmi_pll_recalc_rate()[all …]