| /linux/include/dt-bindings/clock/ |
| H A D | rv1108-cru.h | 155 #define HCLK_ISP 336 macro
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| H A D | px30-cru.h | 126 #define HCLK_ISP 250 macro
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| H A D | rk3288-cru.h | 187 #define HCLK_ISP 469 macro
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| H A D | rk3368-cru.h | 175 #define HCLK_ISP 469 macro
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| H A D | rockchip,rv1126b-cru.h | 176 #define HCLK_ISP 163 macro
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| H A D | rockchip,rv1126-cru.h | 285 #define HCLK_ISP 221 macro
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| H A D | rockchip,rk3576-cru.h | 383 #define HCLK_ISP 365 macro
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| H A D | rk3568-cru.h | 275 #define HCLK_ISP 211 macro
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rv1108.c | 479 GATE(HCLK_ISP, "hclk_isp", "hclk_vio_pre", 0,
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| H A D | clk-rk3368.c | 734 GATE(HCLK_ISP, "hclk_isp", "sclk_isp", 0, RK3368_CLKGATE_CON(16), 14, GFLAGS),
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| H A D | clk-rk3288.c | 791 GATE(HCLK_ISP, "hclk_isp", "hclk_vio", 0, RK3288_CLKGATE_CON(16), 1, GFLAGS),
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| H A D | clk-px30.c | 812 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_pre", 0, PX30_CLKGATE_CON(5), 4, GFLAGS),
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| H A D | clk-rv1126b.c | 605 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_root", 0,
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| H A D | clk-rk3568.c | 1025 GATE(HCLK_ISP, "hclk_isp", "hclk_vi", 0,
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| H A D | clk-rk3576.c | 1069 GATE(HCLK_ISP, "hclk_isp", "hclk_vi_root", 0,
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368.dtsi | 671 <&cru HCLK_ISP>,
848 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
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| H A D | px30.dtsi | 335 <&cru HCLK_ISP>,
1265 <&cru HCLK_ISP>,
1288 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
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| H A D | rk3576.dtsi | 1191 <&cru HCLK_ISP>,
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3288.dtsi | 778 <&cru HCLK_ISP>,
1000 clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
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