Searched refs:HCLGE_MISC_VECTOR_REG_BASE (Results 1 – 3 of 3) sorted by relevance
24 static const u32 common_reg_addr_list[] = {HCLGE_MISC_VECTOR_REG_BASE,
39 #define HCLGE_MISC_VECTOR_REG_BASE 0x20400 macro
2125 {HCLGE_MISC_VECTOR_REG_BASE, "vector0 interrupt enable status"},