Home
last modified time | relevance | path

Searched refs:H (Results 1 – 25 of 248) sorted by relevance

12345678910

/linux/rust/syn/gen/
H A Dhash.rs12 fn hash<H>(&self, state: &mut H) in hash()
14 H: Hasher, in hash()
22 fn hash<H>(&self, state: &mut H) in hash()
24 H: Hasher, in hash()
33 fn hash<H>(&self, state: &mut H) in hash()
35 H: Hasher, in hash()
47 fn hash<H>(&self, state: &mut H) in hash()
49 H: Hasher, in hash()
59 fn hash<H>(&self, state: &mut H) in hash()
61 H: Hasher, in hash()
[all …]
/linux/arch/powerpc/crypto/
H A Dghashp10-ppc.pl57 my ($zero,$t0,$t1,$t2,$xC2,$H,$Hh,$Hl,$lemask)=map("v$_",(4..12));
60 my ($t4,$t5,$t6) = ($Hl,$H,$Hh);
74 lvx_u $H,0,r4 # load H
80 le?vperm $H,$H,$H,5
92 vspltb $t1,$H,0 # most significant byte
93 vsl $H,$H,$t0 # H<<=1
96 vxor $H,$H,$t1 # twisted H
98 vsldoi $H,$H,$H,8 # twist even more ...
100 vsldoi $Hl,$zero,$H,8 # ... and split
101 vsldoi $Hh,$H,$zero,8
[all …]
/linux/Documentation/fb/
H A Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
158 # D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz
179 # D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz
200 # D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz
[all …]
/linux/Documentation/driver-api/media/drivers/ccs/
H A Dmk-ccs-regs51 open(my $H, "> $header") or die "can't open $header";
81 for my $fh ($H, $LH) {
85 print $H <<EOF
92 print $H <<EOF
100 print $H "#define CCS_FL_BASE " .
133 print $H "#define CCS_FL_16BIT " . flag_str(\$flag, \$all_flags) . "\n";
134 print $H "#define CCS_FL_32BIT " . flag_str(\$flag, \$all_flags) . "\n";
137 print $H "#define CCS_FL_FLOAT_IREAL " . flag_str(\$flag, \$all_flags) . "\n";
138 print $H "#define CCS_FL_IREAL " . flag_str(\$flag, \$all_flags) . "\n";
139 print $H "#define CCS_BUILD_BUG \\
[all …]
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun9i-a80.c618 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
622 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
626 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
630 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
634 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
638 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
642 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
648 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
653 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
658 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
[all …]
H A Dpinctrl-sun50i-a64.c515 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
520 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
525 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
530 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
535 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
540 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
545 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
550 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
555 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
560 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
[all …]
H A Dpinctrl-sun8i-a83t.c514 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
524 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
529 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
534 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
544 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
549 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
559 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
[all …]
H A Dpinctrl-sun8i-a33.c437 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
441 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
445 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
449 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
453 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
457 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
461 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
466 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
471 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
476 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
H A Dpinctrl-sun50i-h6.c507 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
515 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
523 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
547 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
555 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
563 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
568 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
573 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
[all …]
H A Dpinctrl-sun8i-a23.c515 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
523 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
527 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
535 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
544 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
549 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
H A Dpinctrl-sun50i-h616.c654 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
661 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
668 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
676 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
683 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
689 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
697 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
705 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
713 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
721 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-class-pwm4 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
13 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
22 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
29 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
37 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
44 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
53 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
60 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
67 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
75 Contact: H Hartley Sweeten <hsweeten@visionengravers.com>
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts94 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
95 <STM32_PINMUX('H', 11, AF14)>, /* LTDC_R5 */
104 <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
105 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
106 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
107 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
108 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
109 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
110 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
111 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
H A Dstm32mp13-pinctrl.dtsi35 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
53 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
176 <STM32_PINMUX('H', 6, AF12)>, /* ETH_RGMII_RXD2 */
179 <STM32_PINMUX('H', 11, AF11)>; /* ETH_RGMII_RX_CLK */
203 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
206 <STM32_PINMUX('H', 11, ANALOG)>; /* ETH_RGMII_RX_CLK */
256 pinmux = <STM32_PINMUX('H', 2, GPIO)>;
293 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
304 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
333 <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */
[all …]
/linux/arch/x86/crypto/
H A Dtwofish-i586-asm_32.S73 movzx b ## H, %edi;\
76 movzx a ## H, %edi;\
83 movzx b ## H, %edi;\
86 movzx a ## H, %edi;\
111 movzx b ## H, %edi;\
114 movzx a ## H, %edi;\
121 movzx b ## H, %edi;\
124 movzx a ## H, %edi;\
148 movzx a ## H, %edi;\
151 movzx b ## H, %edi;\
[all …]
/linux/drivers/gpu/drm/sprd/
H A Dmegacores_pll.c16 #define H 1 macro
237 range[H] = INFINITY; in dphy_timing_config()
244 range[H] = 95 * scale; in dphy_timing_config()
245 tmp = AVERAGE(range[L], range[H]); in dphy_timing_config()
246 val[CLK] = DIV_ROUND_UP(AVERAGE(range[L], range[H]), t_half_byteck) - 1; in dphy_timing_config()
248 range[H] = 85 * scale + 6 * t_ui; in dphy_timing_config()
249 tmp |= AVERAGE(range[L], range[H]) << 16; in dphy_timing_config()
250 val[DATA] = DIV_ROUND_UP(AVERAGE(range[L], range[H]), t_half_byteck) - 1; in dphy_timing_config()
255 range[H] = INFINITY; in dphy_timing_config()
266 range[H] = INFINITY; in dphy_timing_config()
[all …]
/linux/lib/crypto/arm/
H A Dsha256-armv4.pl61 $H="r11";
62 @V=($A,$B,$C,$D,$E,$F,$G,$H);
230 ldmia $ctx,{$A,$B,$C,$D,$E,$F,$G,$H}
270 add $H,$H,$t1
271 stmia $t3,{$A,$B,$C,$D,$E,$F,$G,$H}
472 sub $H,sp,#16*4+16
475 bic $H,$H,#15 @ align for 128-bit stores
477 mov sp,$H @ alloca
506 ldmia $ctx,{$A-$H}
564 add $H,$H,$t4
[all …]
/linux/drivers/scsi/arm/
H A Dcumana_1.c42 #define H(v) (((v)>>16)|((v) & 0xffff0000)) macro
64 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
65 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
66 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
67 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
68 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
69 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
70 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
71 v=*laddr++; writew(L(v), dma); writew(H(v), dma); in cumanascsi_pwrite()
/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l33.txt43 Optional H/G Algorithm sub-node:
46 the internal H/G Algorithm.
48 - cirrus,hg-algo : Sub-node for internal Class H/G algorithm that
53 - cirrus,mem-depth : Memory depth for the Class H/G algorithm measured in
66 - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G
70 - cirrus,ldo-entry-delay : The LDO entry delay in milliseconds before the H/G
75 - cirrus,vp-hg-auto : This is a boolean property. When set, class H/G VPhg
78 - cirrus,vp-hg : Class H/G algorithm VPhg. Controls the H/G algorithm's
H A Dcs35l35.txt69 Optional H/G Algorithm sub-node:
72 that will disable automatic control of the internal H/G Algorithm.
75 or using these Class H Algorithm controls over the internal Algorithm.
78 - cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm
79 See Section 4.3 Internal Class H Algorithm in the Datasheet.
84 Section 7.29 Class H Control
89 Section 7.30 Class H Headroom Control
92 Section 7.31 Class H Release Rate
95 Section 7.32 Class H Weak FET Drive Control
100 Section 7.34 Class H VP Control
/linux/Documentation/hwmon/
H A Dsmsc47b397.rst58 MOV DX,480H
59 MOV AX,25H
61 MOV DX,481H
150 MOV AX,055H
154 MOV AL,20H
178 MOV AX,055H
183 MOV AL,07H
186 MOV AL, 08H
190 MOV AL,60H
/linux/Documentation/trace/
H A Dring-buffer-design.rst452 <---| |--->| |-H->| |--->| |--->
457 The above pointer "-H->" would have the HEADER flag set. That is
469 <---| |--->| |-H->| |--->| |--->
506 +-----H-------------+
514 |page |-------H-----------+
522 | +-----H-------------+ |
531 |page |-------H-----------+
547 |page |-------H-----------+
560 |page |-------H-----------+ <--- New head page
610 <---| |--->| |-H->| |--->| |--->
[all …]
/linux/rust/syn/
H A Dtt.rs51 fn hash<H: Hasher>(&self, h: &mut H) { in hash() argument
102 fn hash<H: Hasher>(&self, state: &mut H) { in hash() argument
/linux/rust/zerocopy-derive/derive/
H A Dmod.rs49 fn hash<H: #core::hash::Hasher>(&self, state: &mut H) { in derive_hash()
53 fn hash_slice<H: #core::hash::Hasher>(data: &[Self], state: &mut H) { in derive_hash()
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dintroduction.rst220 EXT.W.B EXT.W.H CLO.W CLO.D SLZ.W CLZ.D CTO.W CTO.D CTZ.W CTZ.D
222 REVB.2H REVB.4H REVB.2W REVB.D REVH.2W REVH.D BITREV.4B BITREV.8B BITREV.W BITREV.D
231 LD.B LD.BU LD.H LD.HU LD.W LD.WU LD.D ST.B ST.H ST.W ST.D
232 LDX.B LDX.BU LDX.H LDX.HU LDX.W LDX.WU LDX.D STX.B STX.H STX.W STX.D
254 IOCSRRD.B IOCSRRD.H IOCSRRD.W IOCSRRD.D IOCSRWR.B IOCSRWR.H IOCSRWR.W IOCSRWR.D

12345678910