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Searched refs:GUC_GGTT_TOP (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/xe/regs/
H A Dxe_gtt_defs.h14 #define GUC_GGTT_TOP 0xFEE00000 macro
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc.h401 #define GUC_GGTT_TOP 0xFEE00000 macro
422 GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP)); in intel_guc_ggtt_offset()
/linux/drivers/gpu/drm/xe/
H A Dxe_ggtt.c47 * Layout to a predefined GUC_GGTT_TOP. This approach avoids complications related to in xelpg_ggtt_pte_encode_bo()
52 * while on the top side the limit is fixed at GUC_GGTT_TOP. To keep things in xelpg_ggtt_pte_encode_bo()
235 if (ggtt->size > GUC_GGTT_TOP) in xe_ggtt_init_early()
236 ggtt->size = GUC_GGTT_TOP; in xe_ggtt_init_early()
H A Dxe_guc.c47 /* GuC addresses above GUC_GGTT_TOP don't map through the GTT */ in guc_bo_ggtt_addr()
49 xe_assert(xe, addr < GUC_GGTT_TOP); in guc_bo_ggtt_addr()
50 xe_assert(xe, bo->size <= GUC_GGTT_TOP - addr); in guc_bo_ggtt_addr()
H A Dxe_gt_sriov_vf.c534 * WOPCM GUC_GGTT_TOP in vf_balloon_ggtt()
555 end = GUC_GGTT_TOP; in deballoon_ggtt()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_ggtt.c771 * beyond GUC_GGTT_TOP in the GuC address space are inaccessible by GuC,
774 * is limited to 2G, which is less than GUC_GGTT_TOP, but we reserve a chunk
778 #define GUC_TOP_RESERVE_SIZE (SZ_4G - GUC_GGTT_TOP)