| /linux/drivers/pinctrl/ |
| H A D | pinctrl-th1520.c | 173 TH1520_PAD(7, DEBUG_MODE, DBG, ____, ____, GPIO, ____, ____, TH1520_PAD_NO_PADCFG),
175 TH1520_PAD(9, I2C_AON_SCL, I2C, ____, ____, GPIO, ____, ____, 0),
176 TH1520_PAD(10, I2C_AON_SDA, I2C, ____, ____, GPIO, ____, ____, 0),
177 TH1520_PAD(11, CPU_JTG_TCLK, JTAG, ____, ____, GPIO, ____, ____, 0),
178 TH1520_PAD(12, CPU_JTG_TMS, JTAG, ____, ____, GPIO, ____, ____, 0),
179 TH1520_PAD(13, CPU_JTG_TDI, JTAG, ____, ____, GPIO, ____, ____, 0),
180 TH1520_PAD(14, CPU_JTG_TDO, JTAG, ____, ____, GPIO, ____, ____, 0),
181 TH1520_PAD(15, CPU_JTG_TRST, JTAG, ____, ____, GPIO, ____, ____, 0),
182 TH1520_PAD(16, AOGPIO_7, CLK, AUD, ____, GPIO, ____, ____, 0),
183 TH1520_PAD(17, AOGPIO_8, UART, AUD, IR, GPIO, ____, ____, 0),
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| H A D | pinctrl-xway.c | 115 MFP_XWAY(GPIO0, GPIO, EXIN, MII, TDM),
116 MFP_XWAY(GPIO1, GPIO, STP, DFE, EBU),
117 MFP_XWAY(GPIO2, GPIO, STP, DFE, EPHY),
118 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
119 MFP_XWAY(GPIO4, GPIO, GPT, EPHY, MII),
120 MFP_XWAY(GPIO5, GPIO, MII, ASC, GPT),
121 MFP_XWAY(GPIO6, GPIO, MII, ASC, EXIN),
122 MFP_XWAY(GPIO7, GPIO, SPI, MII, JTAG),
123 MFP_XWAY(GPIO8, GPIO, SPI, MII, JTAG),
124 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG),
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| H A D | pinctrl-lpc18xx.c | 240 LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND);
241 LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND);
242 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
243 LPC_P(1,1, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
244 LPC_P(1,2, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
245 LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
246 LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
247 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
248 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);
249 LPC_P(1,7, GPIO, UART1, CTOUT, EMC, USB0, R, R, R, 0, ND);
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| H A D | pinctrl-falcon.c | 107 MFP_FALCON(GPIO0, RST, GPIO, NONE, NONE),
108 MFP_FALCON(GPIO1, GPIO, GPIO, NONE, NONE),
109 MFP_FALCON(GPIO2, GPIO, GPIO, NONE, NONE),
110 MFP_FALCON(GPIO3, GPIO, GPIO, NONE, NONE),
111 MFP_FALCON(GPIO4, NTR, GPIO, NONE, NONE),
112 MFP_FALCON(GPIO5, NTR, GPIO, PPS, NONE),
113 MFP_FALCON(GPIO6, RST, GPIO, NONE, NONE),
114 MFP_FALCON(GPIO7, MDIO, GPIO, NONE, NONE),
115 MFP_FALCON(GPIO8, MDIO, GPIO, NONE, NONE),
116 MFP_FALCON(GPIO9, LED, GPIO, NONE, NONE),
[all …]
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| H A D | Kconfig | 35 bool "AMD GPIO pin control"
44 The driver for memory mapped GPIO functionality on AMD platforms
47 for GPIO use.
53 tristate "AMDISP GPIO pin control"
60 The driver for memory mapped GPIO functionality on AMD platforms
67 tristate "Apple SoC GPIO pin controller driver"
76 This is the driver for the GPIO controller found on Apple ARM SoCs,
94 tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
99 AS3722 device supports the configuration of GPIO pins for different
101 open drain configuration for the GPIO pins of AS3722 devices. It also
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| /linux/drivers/gpio/ |
| H A D | Kconfig | 3 # GPIO infrastructure and drivers
13 bool "GPIO Support"
15 This enables GPIO support through the generic GPIO library.
17 one or more of the GPIO drivers below.
54 bool "Debug GPIO calls"
57 Say Y here to add some extra checks and diagnostics to GPIO calls.
71 This ABI is deprecated. If you want to use GPIO from userspace,
80 Say Y here if you want to enable the legacy, global GPIO
91 Only say N if you are sure that the GPIO character device is not
97 bool "Support GPIO ABI Version 1"
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-chromeos-acpi | 67 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.0
68 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.0
72 Returns type of the GPIO signal for the Chrome OS specific
73 GPIO assignments (integer).
79 256 to 511 Debug header GPIO 0 to GPIO 255.
82 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.1
83 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.1
87 Returns signal attributes of the GPIO signal (integer bitfield).
94 What: /sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.2
95 /sys/bus/platform/devices/GOOG0016:*/GPIO.X/GPIO.2
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| /linux/arch/arm/boot/dts/hisilicon/ |
| H A D | hi3620-hi4511.dts | 71 0x008 0x0 /* GPIO -- eFUSE_DOUT */
95 0x0f8 0x1 /* GPIO (IOMG61) */
96 0x0fc 0x1 /* GPIO (IOMG62) */
107 0x104 0x1 /* GPIO (IOMG96) */
108 0x108 0x1 /* GPIO (IOMG64) */
119 0x160 0x1 /* GPIO (IOMG85) */
120 0x164 0x1 /* GPIO (IOMG86) */
132 0x168 0x1 /* GPIO (IOMG87) */
133 0x16c 0x1 /* GPIO (IOMG88) */
134 0x170 0x1 /* GPIO (IOMG93) */
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| /linux/arch/arm64/boot/dts/bitmain/ |
| H A D | bm1880-sophon-edge.dts | 12 * GPIO name legend: proper name = the GPIO line is used as GPIO
15 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
30 * are the only ones actually used for GPIO.
56 "GPIO-A", /* GPIO0, LSEC pin 23 */
57 "GPIO-C", /* GPIO1, LSEC pin 25 */
59 "GPIO-E", /* GPIO3, LSEC pin 27 */
63 "GPIO-G", /* GPIO7, LSEC pin 29 */
112 "GPIO-I", /* GPIO50, LSEC pin 31 */
113 "GPIO-K", /* GPIO51, LSEC pin 33 */
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| /linux/Documentation/driver-api/gpio/ |
| H A D | drivers-on-gpio.rst | 2 Subsystem drivers using GPIO
5 Note that standard kernel drivers exist for common GPIO tasks and will provide
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
21 GPIO line cannot generate interrupts, so it needs to be periodically polled
26 mouse cable and connect the wires to GPIO lines or solder a mouse connector
30 an external speaker connected to a GPIO line. (If the beep is controlled by
33 - pwm-gpio: drivers/pwm/pwm-gpio.c is used to toggle a GPIO with a high
34 resolution timer producing a PWM waveform on the GPIO line, as well as
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| H A D | intro.rst | 6 GPIO Interfaces
14 What is a GPIO?
17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
19 to Linux developers working with embedded and custom hardware. Each GPIO
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
30 also "GPIO Expander" chips that connect using the I2C or SPI serial buses.
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
43 cases (to support bidirectional signaling). GPIO controllers may have
50 - Usually a GPIO will be configurable as either input or output, as needed
56 On a given board each GPIO is used for one specific purpose like monitoring
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| H A D | consumer.rst | 2 GPIO Descriptor Consumer Interface
5 This document describes the consumer interface of the GPIO framework.
11 Drivers that can't work without standard GPIO calls should have Kconfig entries
35 All the functions that work with the descriptor-based GPIO interface are
48 device that will use the GPIO and the function the requested GPIO is supposed to
65 for the GPIO. Values can be:
67 * GPIOD_ASIS or 0 to not initialize the GPIO at all. The direction must be set
69 * GPIOD_IN to initialize the GPIO as input.
70 * GPIOD_OUT_LOW to initialize the GPIO as output with a value of 0.
71 * GPIOD_OUT_HIGH to initialize the GPIO as output with a value of 1.
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-dhcom-pdk2.dts | 30 enable-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; /* GPIO G */
39 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* GPIO A */
40 label = "TA1-GPIO-A";
46 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; /* GPIO B */
47 label = "TA2-GPIO-B";
53 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
54 label = "TA3-GPIO-C";
60 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; /* GPIO D */
61 label = "TA4-GPIO-D";
71 * Disable PDK2 LED5, because GPIO E is
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| /linux/Documentation/admin-guide/gpio/ |
| H A D | gpio-aggregator.rst | 3 GPIO Aggregator
6 The GPIO Aggregator provides a mechanism to aggregate GPIOs, and expose them as
13 GPIO controllers are exported to userspace using /dev/gpiochip* character
15 system permissions, on an all-or-nothing basis: either a GPIO controller is
18 The GPIO Aggregator provides access control for a set of one or more GPIOs, by
22 grab the full GPIO controller, and no longer needs to care about which GPIOs to
25 Aggregated GPIO controllers are instantiated and destroyed by writing to
31 Userspace may ask the kernel to instantiate an aggregated GPIO
42 is a GPIO line name,
45 is a GPIO chip label, and
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| /linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi3798cv200-poplar.dts | 108 gpio-line-names = "GPIO-E", "",
110 "", "GPIO-F",
111 "", "GPIO-J";
116 gpio-line-names = "GPIO-H", "GPIO-I",
117 "GPIO-L", "GPIO-G",
118 "GPIO-K", "",
126 "GPIO-C", "",
127 "", "GPIO-B";
134 "", "GPIO-D",
142 "", "GPIO-A",
|
| H A D | hi3670-hikey970.dts | 59 * Legend: proper name = the GPIO line is used as GPIO
62 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
79 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
80 * ones actually used for GPIO.
103 "GPIO-I", /* LSEC pin 31: GPIO_013_CAM0_RST_N */
111 "GPIO-G", /* LSEC pin 29: GPIO_016_LCD_TE0 */
129 "GPIO-H", /* LSEC pin 30: GPIO_029_LCD_RST_N */
131 "GPIO-L"; /* LSEC pin 34: GPIO_031 */
137 "GPIO-K", /* LSEC pin 33: GPIO_032_CAM1_RST_N */
172 "GPIO-D", /* LSEC pin 26 */
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | qrb5165-rb5.dts | 1171 "GPIO-MM",
1172 "GPIO-NN",
1173 "GPIO-OO",
1174 "GPIO-PP",
1175 "GPIO-A",
1176 "GPIO-C",
1177 "GPIO-E",
1178 "GPIO-D",
1181 "GPIO-TT", /* GPIO_10 */
1185 "GPIO-X",
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|
| /linux/Documentation/firmware-guide/acpi/ |
| H A D | gpio-properties.rst | 4 _DSD Device Properties Related to GPIO
10 the corresponding GPIO, which is pretty error prone (it depends on
40 The format of the supported GPIO property is::
52 If 1, the GPIO is marked as active-low.
56 Setting it to 1 marks the GPIO as active-low.
62 resource, second pin in that resource with the GPIO number of 31.
109 ^GPIO, 19, 0, 0, // chip select 0: GPIO
111 ^GPIO, 20, 0, 0, // chip select 2: GPIO
115 Note, that historically ACPI has no means of the GPIO polarity and thus
117 to avoid a chain of negations, the GPIO polarity is considered being
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| /linux/Documentation/userspace-api/gpio/ |
| H A D | sysfs.rst | 1 GPIO Sysfs Interface for Userspace
19 debugfs interface, since it provides control over GPIO direction and
24 know for example that GPIO #23 controls the write protect line used to
26 may need to temporarily remove that protection, first importing a GPIO,
28 the write protection. In normal use, GPIO #23 would never be touched,
32 userspace GPIO can be used to determine system configuration data that
34 GPIO drivers could be all that the system really needs.
51 - GPIO controllers ("gpio_chip" instances).
61 a GPIO to userspace by writing its number to this file.
64 for GPIO #19, if that's not requested by kernel code.
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| /linux/arch/arm64/boot/dts/actions/ |
| H A D | s900-bubblegum-96.dts | 68 * GPIO name legend: proper name = the GPIO line is used as GPIO
71 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
88 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
89 * are the only ones actually used for GPIO.
94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
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| /linux/Documentation/i2c/muxes/ |
| H A D | i2c-mux-gpio.rst | 11 from a master I2C bus and a hardware MUX controlled through GPIO pins.
19 | Linux | GPIO 1..N | MUX |--------------- Devices
26 according to the settings of the GPIO pins 1..N.
34 bus, the number of bus segments to create and the GPIO pins used
38 controlled through 3 GPIO pins::
69 If you don't know the absolute GPIO pin numbers at registration time,
70 you can instead provide a chip name (.chip_name) and relative GPIO pin
72 including deferred probing if the GPIO chip isn't immediately
79 of any GPIO pin it uses as the device ID. This guarantees that every
85 GPIO pin numbers at registration time, this is even the only option.
|
| /linux/Documentation/driver-api/hte/ |
| H A D | tegra-hte.rst | 9 driver implements two GTE instances: 1) GPIO GTE and 2) LIC
14 GPIO GTE
17 This GTE instance timestamps GPIO in real time. For that to happen GPIO
18 needs to be configured as input. Only the always on (AON) GPIO controller
20 the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned
21 below. The GPIO GTE code supports both kernel and userspace consumers. The
26 consumer can request an GPIO line.
44 The provider source code of both IRQ and GPIO GTE instances is located at
47 and GPIO GTE.
|
| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-friendlyelec-cm3588-nas.dts | 240 /* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */
414 /* GPIO Connector, connected to 40-pin GPIO header */
561 /* GPIO Connector, connected to 40-pin GPIO header */
569 /* GPIO Connector, connected to 40-pin GPIO header */
583 /* GPIO Connector, connected to 40-pin GPIO header */
590 /* GPIO Connector, connected to 40-pin GPIO header */
598 /* GPIO Connector, connected to 40-pin GPIO header */
606 /* GPIO Connector, connected to 40-pin GPIO header */
614 /* GPIO Connector, connected to 40-pin GPIO header */
621 /* GPIO Connector, connected to 40-pin GPIO header */
[all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-dhcom-pdk2.dts | 36 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */
37 label = "TA1-GPIO-A";
45 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */
46 label = "TA2-GPIO-B";
54 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
55 label = "TA3-GPIO-C";
63 gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
64 label = "TA4-GPIO-D";
92 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */
102 gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */
[all …]
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| /linux/drivers/pinctrl/nuvoton/ |
| H A D | Kconfig | 4 tristate "Pinctrl and GPIO driver for Nuvoton WPCM450"
15 Say Y or M here to enable pin controller and GPIO support for
23 bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX"
32 Say Y here to enable pin controller and GPIO support
36 tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
45 Say Y or M here to enable pin controller and GPIO support for
61 bool "Pinctrl and GPIO driver for Nuvoton MA35D1"
65 Say Y here to enable pin controller and GPIO support
|