Searched refs:GCC_USB3_PHY_SEC_BCR (Results 1 – 24 of 24) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,gcc-sc7180.h | 151 #define GCC_USB3_PHY_SEC_BCR 7 macro
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| H A D | qcom,qdu1000-gcc.h | 167 #define GCC_USB3_PHY_SEC_BCR 22 macro
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| H A D | qcom,sm7150-gcc.h | 170 #define GCC_USB3_PHY_SEC_BCR 8 macro
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| H A D | qcom,sar2130p-gcc.h | 163 #define GCC_USB3_PHY_SEC_BCR 26 macro
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| H A D | qcom,sm4450-gcc.h | 187 #define GCC_USB3_PHY_SEC_BCR 23 macro
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| H A D | qcom,sm8550-gcc.h | 213 #define GCC_USB3_PHY_SEC_BCR 29 macro
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| H A D | qcom,gcc-sm8450.h | 232 #define GCC_USB3_PHY_SEC_BCR 30 macro
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| H A D | qcom,kaanapali-gcc.h | 233 #define GCC_USB3_PHY_SEC_BCR 30 macro
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| H A D | qcom,gcc-sdm845.h | 225 #define GCC_USB3_PHY_SEC_BCR 20 macro
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| H A D | qcom,gcc-sm8150.h | 232 #define GCC_USB3_PHY_SEC_BCR 19 macro
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| H A D | qcom,sm8650-gcc.h | 237 #define GCC_USB3_PHY_SEC_BCR 30 macro
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| H A D | qcom,gcc-sm8350.h | 245 #define GCC_USB3_PHY_SEC_BCR 31 macro
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| H A D | qcom,gcc-sm8250.h | 251 #define GCC_USB3_PHY_SEC_BCR 39 macro
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| H A D | qcom,sa8775p-gcc.h | 296 #define GCC_USB3_PHY_SEC_BCR 34 macro
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| H A D | qcom,gcc-sc8280xp.h | 460 #define GCC_USB3_PHY_SEC_BCR 58 macro
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| /linux/drivers/clk/qcom/ |
| H A D | gcc-sc7180.c | 2381 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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| H A D | gcc-sar2130p.c | 2256 [GCC_USB3_PHY_SEC_BCR] = { 0x6000c },
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| H A D | gcc-sm7150.c | 2919 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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| H A D | gcc-sm8250.c | 3575 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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| H A D | gcc-sm8350.c | 3742 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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| H A D | gcc-sa8775p.c | 4589 [GCC_USB3_PHY_SEC_BCR] = { 0x5c00c },
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| H A D | gcc-sc8280xp.c | 7427 [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | glymur.dtsi | 2524 resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
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| H A D | hamoa.dtsi | 2965 resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
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