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Searched refs:GCC_PCIE_PHY_BCR (Results 1 – 24 of 24) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdx55.h100 #define GCC_PCIE_PHY_BCR 4 macro
H A Dqcom,gcc-sdx65.h104 #define GCC_PCIE_PHY_BCR 11 macro
H A Dqcom,sm7150-gcc.h163 #define GCC_PCIE_PHY_BCR 1 macro
H A Dqcom,sdx75-gcc.h181 #define GCC_PCIE_PHY_BCR 14 macro
H A Dqcom,sar2130p-gcc.h150 #define GCC_PCIE_PHY_BCR 13 macro
H A Dqcom,sm4450-gcc.h172 #define GCC_PCIE_PHY_BCR 8 macro
H A Dqcom,sm8550-gcc.h197 #define GCC_PCIE_PHY_BCR 13 macro
H A Dqcom,gcc-sm8450.h216 #define GCC_PCIE_PHY_BCR 14 macro
H A Dqcom,kaanapali-gcc.h214 #define GCC_PCIE_PHY_BCR 11 macro
H A Dqcom,gcc-sdm845.h208 #define GCC_PCIE_PHY_BCR 3 macro
H A Dqcom,gcc-sm8150.h221 #define GCC_PCIE_PHY_BCR 8 macro
H A Dqcom,sm8650-gcc.h220 #define GCC_PCIE_PHY_BCR 13 macro
H A Dqcom,gcc-sm8250.h231 #define GCC_PCIE_PHY_BCR 19 macro
H A Dqcom,gcc-msm8998.h284 #define GCC_PCIE_PHY_BCR 78 macro
H A Dqcom,gcc-msm8996.h325 #define GCC_PCIE_PHY_BCR 85 macro
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi372 resets = <&gcc GCC_PCIE_PHY_BCR>;
/linux/drivers/clk/qcom/
H A Dgcc-sdx65.c1527 [GCC_PCIE_PHY_BCR] = { 0x44000 },
H A Dgcc-sdx55.c1567 [GCC_PCIE_PHY_BCR] = { 0x39000 },
H A Dgcc-sar2130p.c2243 [GCC_PCIE_PHY_BCR] = { 0x7f000 },
H A Dgcc-sm7150.c2912 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
H A Dgcc-qcs615.c2929 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
H A Dgcc-msm8998.c3287 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
H A Dgcc-msm8996.c3562 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
H A Dgcc-sm8250.c3555 [GCC_PCIE_PHY_BCR] = { 0x6f000 },