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Searched refs:GCC_GPLL0 (Results 1 – 25 of 29) sorted by relevance

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/linux/include/dt-bindings/clock/
H A Dqcom,qdu1000-gcc.h10 #define GCC_GPLL0 0 macro
H A Dqcom,sar2130p-gcc.h10 #define GCC_GPLL0 0 macro
H A Dqcom,sm4450-gcc.h34 #define GCC_GPLL0 24 macro
H A Dqcom,gcc-sc7280.h10 #define GCC_GPLL0 0 macro
H A Dqcom,sm8550-gcc.h35 #define GCC_GPLL0 24 macro
H A Dqcom,qcs8300-gcc.h10 #define GCC_GPLL0 0 macro
H A Dqcom,gcc-sm8450.h50 #define GCC_GPLL0 38 macro
H A Dqcom,sm8650-gcc.h34 #define GCC_GPLL0 23 macro
H A Dqcom,gcc-sm8350.h47 #define GCC_GPLL0 35 macro
H A Dqcom,sa8775p-gcc.h11 #define GCC_GPLL0 0 macro
H A Dqcom,gcc-sc8280xp.h11 #define GCC_GPLL0 0 macro
H A Dqcom,x1e80100-gcc.h56 #define GCC_GPLL0 46 macro
/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi601 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
H A Dsm8350.dtsi3586 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
/linux/drivers/clk/qcom/
H A Dgcc-sar2130p.c2133 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-qdu1000.c2471 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sm4450.c2633 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sm8550.c3099 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sc7280.c3216 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sm8450.c3169 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-qcs8300.c3360 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sm8350.c3528 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sm8650.c3533 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-sa8775p.c4363 [GCC_GPLL0] = &gcc_gpll0.clkr,
H A Dgcc-x1e80100.c6278 [GCC_GPLL0] = &gcc_gpll0.clkr,

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