Searched refs:GCC_GPLL0 (Results 1 – 25 of 25) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,qdu1000-gcc.h | 10 #define GCC_GPLL0 0 macro
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| H A D | qcom,sar2130p-gcc.h | 10 #define GCC_GPLL0 0 macro
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| H A D | qcom,sm4450-gcc.h | 34 #define GCC_GPLL0 24 macro
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| H A D | qcom,gcc-sc7280.h | 10 #define GCC_GPLL0 0 macro
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| H A D | qcom,sm8550-gcc.h | 35 #define GCC_GPLL0 24 macro
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| H A D | qcom,gcc-sm8450.h | 50 #define GCC_GPLL0 38 macro
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| H A D | qcom,qcs8300-gcc.h | 10 #define GCC_GPLL0 0 macro
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| H A D | qcom,kaanapali-gcc.h | 36 #define GCC_GPLL0 26 macro
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| H A D | qcom,sm8650-gcc.h | 34 #define GCC_GPLL0 23 macro
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| H A D | qcom,gcc-sm8350.h | 47 #define GCC_GPLL0 35 macro
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| H A D | qcom,sa8775p-gcc.h | 11 #define GCC_GPLL0 0 macro
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| H A D | qcom,gcc-sc8280xp.h | 11 #define GCC_GPLL0 0 macro
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| H A D | qcom,glymur-gcc.h | 10 #define GCC_GPLL0 0 macro
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm4450.dtsi | 669 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
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| H A D | sc8280xp.dtsi | 5752 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
5769 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| H A D | sm8650.dtsi | 7420 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
7446 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
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| H A D | sm8350.dtsi | 3712 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| H A D | sm8450.dtsi | 5273 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| H A D | sm8550.dtsi | 5446 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
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| /linux/drivers/clk/qcom/ |
| H A D | gcc-sar2130p.c | 2133 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| H A D | gcc-sc7280.c | 3216 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| H A D | gcc-qcs8300.c | 3360 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| H A D | gcc-sm8350.c | 3528 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| H A D | gcc-sa8775p.c | 4363 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| H A D | gcc-sc8280xp.c | 7048 [GCC_GPLL0] = &gcc_gpll0.clkr,
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