Searched refs:GATE_CLK_AXI_DDR (Results 1 – 2 of 2) sorted by relevance
104 #define GATE_CLK_AXI_DDR 86 macro
677 SG2042_GATE_HWS(GATE_CLK_AXI_DDR, "clk_gate_axi_ddr", clk_mux_axi_ddr,