| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_utils.c | 128 …dml_output_array->ForcedOutputLinkBPP[dst_index] = dml_output_array->ForcedOutputLinkBPP[src_index… in dml2_util_copy_dml_output()
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| H A D | display_mode_core.c | 85 dml_float_t ForcedOutputLinkBPP,
5369 dml_float_t ForcedOutputLinkBPP, in CalculateOutputLink() argument
5401 …(600, PHYCLKPerState) * 10, 3, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, false, Out… in CalculateOutputLink()
5427 …0) * 10000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
5429 …2PerState < 13500 / 32.0 && DSCEnable == dml_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) { in CalculateOutputLink()
5432 …0) * 10000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
5440 …0) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
5443 …D32PerState < 20000 / 32 && DSCEnable == dml_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) { in CalculateOutputLink()
5446 …0) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
5454 …0) * 20000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
[all …]
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| H A D | display_mode_core_structs.h | 630 dml_float_t ForcedOutputLinkBPP[__DML_NUM_PLANES__]; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 260 double ForcedOutputLinkBPP,
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| H A D | display_mode_vba_32.c | 2098 mode_lib->vba.ForcedOutputLinkBPP[k], in dml32_ModeSupportAndSystemConfigurationFull()
2361 if (mode_lib->vba.DSCEnable[k] && mode_lib->vba.ForcedOutputLinkBPP[k] != 0) in dml32_ModeSupportAndSystemConfigurationFull()
2381 if (mode_lib->vba.OutputMultistreamId[k] == k && mode_lib->vba.ForcedOutputLinkBPP[k] == 0) in dml32_ModeSupportAndSystemConfigurationFull()
2385 && mode_lib->vba.ForcedOutputLinkBPP[k] == 0) in dml32_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 4234 double ForcedOutputLinkBPP, in CalculateOutputLink() argument
4271 DML_LOG_VERBOSE("DML::%s: ForcedOutputLinkBPP = %f\n", __func__, ForcedOutputLinkBPP); in CalculateOutputLink()
4279 …ath_min2(600, PHYCLK) * 10, 3, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, false, Out… in CalculateOutputLink()
4304 …0) * 10000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
4306 …HYCLKD32 < 13500.0 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) { in CalculateOutputLink()
4309 …0) * 10000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
4317 …0) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
4320 …HYCLKD32 < 20000.0 / 32 && DSCEnable == dml2_dsc_enable_if_necessary && ForcedOutputLinkBPP == 0) { in CalculateOutputLink()
4323 …0) * 13500, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
4331 …0) * 20000, OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, ForcedOutputLinkBPP, LinkDSCEna… in CalculateOutputLink()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 635 mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpp; in fetch_pipe_params()
637 mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = 0.0; in fetch_pipe_params()
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| H A D | display_mode_vba.h | 693 double ForcedOutputLinkBPP[DC__NUM_DPP__MAX]; // Mode Support only member
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