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Searched refs:FIFO (Results 1 – 25 of 129) sorted by relevance

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/linux/drivers/staging/axis-fifo/
H A DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
H A Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
37 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
45 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
51 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
54 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcirrus,clps711x-intc.txt24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
29 17: SS2RX SSI2 receive FIFO half or greater full
30 18: SS2TX SSI2 transmit FIFO less than half empty
31 28: UTXINT2 UART2 transmit FIFO half empty
32 29: URXINT2 UART2 receive FIFO half full
/linux/Documentation/networking/device_drivers/can/freescale/
H A Dflexcan.rst15 - FIFO
20 configured for RX-FIFO mode.
22 The RX FIFO mode uses a hardware FIFO with a depth of 6 CAN frames,
23 while the mailbox mode uses a software FIFO with a depth of up to 62
40 more performant "RX mailbox" mode and will use "RX FIFO" mode
/linux/Documentation/accel/qaic/
H A Daic100.rst246 FIFO is the request FIFO. The other FIFO is the response FIFO.
250 * Request FIFO head pointer (offset 0x0). Read only by the host. Indicates the
251 latest item in the FIFO the device has consumed.
252 * Request FIFO tail pointer (offset 0x4). Read/write by the host. Host
253 increments this register to add new items to the FIFO.
254 * Response FIFO head pointer (offset 0x8). Read/write by the host. Indicates
255 the latest item in the FIFO the host has consumed.
256 * Response FIFO tail pointer (offset 0xc). Read only by the host. Device
257 increments this register to add new items to the FIFO.
259 The values in each register are indexes in the FIFO. To get the location of the
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/linux/drivers/video/fbdev/riva/
H A Driva_hw.c1351 LOAD_FIXED_STATE(nv4,FIFO); in UpdateFifoState()
1353 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1362 LOAD_FIXED_STATE(nv10,FIFO); in UpdateFifoState()
1364 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1397 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1436 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1441 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1482 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1487 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1645 LOAD_FIXED_STATE(Riva,FIFO); in LoadStateExt()
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/linux/Documentation/security/tpm/
H A Dtpm_tis.rst4 TPM FIFO interface driver
7 TCG PTP Specification defines two interface types: FIFO and CRB. The former is
11 FIFO (First-In-First-Out) interface is used by the tpm_tis_core dependent
17 framework for FIFO drivers is named as tpm_tis_core. The postfix "tis" in
/linux/Documentation/devicetree/bindings/serial/
H A Dmvebu-uart.txt7 (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
8 FIFO), called also UART1.
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
11 accesses to the FIFO), called also UART2.
/linux/Documentation/devicetree/bindings/edac/
H A Dsocfpga-eccmgr.txt85 Ethernet FIFO ECC
93 NAND FIFO ECC
101 DMA FIFO ECC
109 USB FIFO ECC
117 QSPI FIFO ECC
125 SDMMC FIFO ECC
268 Ethernet FIFO ECC
275 NAND FIFO ECC
282 DMA FIFO ECC
289 USB FIFO ECC
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
19 PSC FIFO Controller and b is a field that represents an
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.seq169 * Since this status did not consume a FIFO, we have to
171 * to this transaction. There are two states that a FIFO still
174 * 1) Configured and draining to the host, with a FIFO handler.
177 * Case 1 can be detected by noticing a non-zero FIFO active
179 * the FIFO to complete the SCB.
182 * pointers for this same context in the other FIFO. So, if
308 * The FIFO use count field is shared with the
583 * Allocate a FIFO for a non-packetized transaction.
585 * can allocate a FIFO for a non-packetized transaction.
589 * Do whatever work is required to free a FIFO.
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H A Daic79xx.reg424 * Data FIFO Control
462 * Data FIFO Status
617 * Data FIFO Threshold
1136 * Data FIFO 0 PCI Status
1155 * Data FIFO 1 PCI Status
1692 * Data FIFO Status
2394 * Good Status FIFO
2405 * Data FIFO SCSI Transfer Control
2506 * Data FIFO Status
2516 field DLZERO 0x04 /* FIFO data ends on packet boundary. */
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/linux/arch/sparc/include/asm/
H A Dfloppy_64.h450 #define FIFO (port + 5) macro
469 sun_pci_fd_out_byte(port, 0x08, FIFO); in sun_pci_fd_sensei()
480 result[i++] = inb(FIFO); in sun_pci_fd_sensei()
515 sun_pci_fd_out_byte(port, 0x07, FIFO); in sun_pci_fd_test_drive()
516 sun_pci_fd_out_byte(port, drive & 0x03, FIFO); in sun_pci_fd_test_drive()
531 #undef FIFO
/linux/drivers/char/tpm/
H A DKconfig62 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
67 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
73 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
79 TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
92 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (I2C - generic)"
104 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface (MMIO - SynQuacer)"
109 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
/linux/arch/powerpc/platforms/512x/
H A DKconfig14 tristate "MPC512x LocalPlus Bus FIFO driver"
17 Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
/linux/drivers/video/fbdev/nvidia/
H A Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
/linux/drivers/edac/
H A DKconfig426 bool "Altera Ethernet FIFO ECC"
430 Altera Ethernet FIFO Memory for Altera SoCs.
433 bool "Altera NAND FIFO ECC"
437 Altera NAND FIFO Memory for Altera SoCs.
440 bool "Altera DMA FIFO ECC"
444 Altera DMA FIFO Memory for Altera SoCs.
447 bool "Altera USB FIFO ECC"
451 Altera USB FIFO Memory for Altera SoCs.
454 bool "Altera QSPI FIFO ECC"
458 Altera QSPI FIFO Memory for Altera SoCs.
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/linux/Documentation/devicetree/bindings/dma/
H A Datmel-dma.txt31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.
/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst194 device HW queue (FIFO, mailboxes or whatever the implementation is)
335 the RXNE (RX FIFO Not Empty) bit is set. Frames are read one by one
336 until either no frame is left in the RX FIFO or the maximum work quota
344 in the first word of RX FIFO.
347 for the frame, and only if it succeeds, fetch the frame from FIFO;
349 correct ``skb``, we have to fetch the first work of FIFO. There are
359 #. Add option to peek into the FIFO instead of consuming the word.
372 a partial frame may stay in the FIFO for a prolonged time. Nonetheless,
373 there may be just one owner of the RX FIFO, and thus no one else should
400 SocketCAN, however, supports only one FIFO queue for outgoing
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/linux/arch/arm/include/debug/
H A Dsamsung.S56 @ FIFO enabled...
80 @ FIFO enabled...
/linux/sound/soc/cirrus/
H A DKconfig24 Underflow of internal I2S controller FIFO could confuse the
28 fills FIFO with zeroes.
/linux/Documentation/sound/cards/
H A Dsb-live-mixer.rst93 The result is forwarded to the ADC capture FIFO (thus to the standard capture
106 The result is forwarded to the ADC capture FIFO (thus to the standard capture
120 The result is forwarded to the ADC capture FIFO (thus to the standard capture
149 of the AC97 codec. The result is forwarded to the ADC capture FIFO (thus to
166 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
178 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
189 digital inputs. The result samples are forwarded to the ADC capture FIFO
201 digital inputs. The result samples are forwarded to the ADC capture FIFO
214 capture FIFO (thus to the standard capture PCM device).
/linux/Documentation/admin-guide/blockdev/
H A Dfloppy.rst98 you have an FDC without a FIFO (8272A or 82072). 82072A and
100 If you use nodma mode, I suggest you also set the FIFO
104 If you have a FIFO-able FDC, the floppy driver automatically
113 Disables the FIFO entirely. This is needed if you get "Bus
118 Enables the FIFO. (default)
121 Sets the FIFO threshold. This is mostly relevant in DMA
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dpanel.txt10 - fdd: FIFO DMA Request Delay
14 - fifo-th: DMA FIFO threshold
/linux/fs/bcachefs/
H A Dfifo.h7 #define FIFO(type) \ macro
13 #define DECLARE_FIFO(type, name) FIFO(type) name

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