Home
last modified time | relevance | path

Searched refs:FDI_RX_CTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_fdi.c67 cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE; in assert_fdi_rx()
108 cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE; in assert_fdi_rx_pll()
432 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) & in cpt_set_fdi_bc_bifurcation()
435 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) & in cpt_set_fdi_bc_bifurcation()
492 reg = FDI_RX_CTL(pipe); in intel_fdi_normal_train()
551 reg = FDI_RX_CTL(pipe); in ilk_fdi_link_train()
583 intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), in ilk_fdi_link_train()
585 intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe)); in ilk_fdi_link_train()
657 reg = FDI_RX_CTL(pipe); in gen6_fdi_link_train()
708 reg = FDI_RX_CTL(pipe); in gen6_fdi_link_train()
[all …]
H A Dintel_fdi_regs.h83 #define FDI_RX_CTL(pipe) _MMIO_PIPE(pipe, _FDI_RXA_CTL, _FDI_RXB_CTL) macro
H A Dintel_pch_display.c511 tmp = intel_de_read(dev_priv, FDI_RX_CTL(pipe)); in ilk_pch_get_config()
631 tmp = intel_de_read(dev_priv, FDI_RX_CTL(PIPE_A)); in lpt_pch_get_config()
H A Dintel_crt.c1146 FDI_RX_CTL(PIPE_A)) & fdi_config; in intel_crt_init()
/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c855 fdi_rx_ctl = FDI_RX_CTL(pipe); in check_fdi_rx_train_status()
903 calc_index(offset, FDI_RX_CTL(PIPE_A), FDI_RX_CTL(PIPE_B), FDI_RX_CTL(PIPE_C))
2337 MMIO_DH(FDI_RX_CTL(PIPE_A), D_ALL, NULL, update_fdi_rx_iir_status); in init_generic_mmio_info()
2338 MMIO_DH(FDI_RX_CTL(PIPE_B), D_ALL, NULL, update_fdi_rx_iir_status); in init_generic_mmio_info()
2339 MMIO_DH(FDI_RX_CTL(PIPE_C), D_ALL, NULL, update_fdi_rx_iir_status); in init_generic_mmio_info()
/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c343 MMIO_D(FDI_RX_CTL(PIPE_A)); in iterate_generic_mmio()
344 MMIO_D(FDI_RX_CTL(PIPE_B)); in iterate_generic_mmio()
345 MMIO_D(FDI_RX_CTL(PIPE_C)); in iterate_generic_mmio()