1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <linux/bitfield.h>
4 #include <linux/clk.h>
5 #include <linux/hwmon.h>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/polynomial.h>
10 #include <linux/regmap.h>
11
12 /*
13 * The original translation formulae of the temperature (in degrees of Celsius)
14 * are as follows:
15 *
16 * T = -3.4627e-11*(N^4) + 1.1023e-7*(N^3) + -1.9165e-4*(N^2) +
17 * 3.0604e-1*(N^1) + -5.6197e1
18 *
19 * where [-56.197, 136.402]C and N = [0, 1023].
20 *
21 * They must be accordingly altered to be suitable for the integer arithmetics.
22 * The technique is called 'factor redistribution', which just makes sure the
23 * multiplications and divisions are made so to have a result of the operations
24 * within the integer numbers limit. In addition we need to translate the
25 * formulae to accept millidegrees of Celsius. Here what it looks like after
26 * the alterations:
27 *
28 * T = -34627e-12*(N^4) + 110230e-9*(N^3) + -191650e-6*(N^2) +
29 * 306040e-3*(N^1) + -56197
30 *
31 * where T = [-56197, 136402]mC and N = [0, 1023].
32 */
33
34 static const struct polynomial poly_N_to_temp = {
35 .terms = {
36 {4, -34627, 1000, 1},
37 {3, 110230, 1000, 1},
38 {2, -191650, 1000, 1},
39 {1, 306040, 1000, 1},
40 {0, -56197, 1, 1}
41 }
42 };
43
44 #define PVT_SENSOR_CTRL 0x0 /* unused */
45 #define PVT_SENSOR_CFG 0x4
46 #define SENSOR_CFG_CLK_CFG GENMASK(27, 20)
47 #define SENSOR_CFG_TRIM_VAL GENMASK(13, 9)
48 #define SENSOR_CFG_SAMPLE_ENA BIT(8)
49 #define SENSOR_CFG_START_CAPTURE BIT(7)
50 #define SENSOR_CFG_CONTINIOUS_MODE BIT(6)
51 #define SENSOR_CFG_PSAMPLE_ENA GENMASK(1, 0)
52 #define PVT_SENSOR_STAT 0x8
53 #define SENSOR_STAT_DATA_VALID BIT(10)
54 #define SENSOR_STAT_DATA GENMASK(9, 0)
55
56 #define FAN_CFG 0x0
57 #define FAN_CFG_DUTY_CYCLE GENMASK(23, 16)
58 #define INV_POL BIT(3)
59 #define GATE_ENA BIT(2)
60 #define PWM_OPEN_COL_ENA BIT(1)
61 #define FAN_STAT_CFG BIT(0)
62 #define FAN_PWM_FREQ 0x4
63 #define FAN_PWM_CYC_10US GENMASK(25, 15)
64 #define FAN_PWM_FREQ_FREQ GENMASK(14, 0)
65 #define FAN_CNT 0xc
66 #define FAN_CNT_DATA GENMASK(15, 0)
67
68 #define LAN966X_PVT_CLK 1200000 /* 1.2 MHz */
69
70 struct lan966x_hwmon {
71 struct regmap *regmap_pvt;
72 struct regmap *regmap_fan;
73 struct clk *clk;
74 unsigned long clk_rate;
75 };
76
lan966x_hwmon_read_temp(struct device * dev,long * val)77 static int lan966x_hwmon_read_temp(struct device *dev, long *val)
78 {
79 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
80 unsigned int data;
81 int ret;
82
83 ret = regmap_read(hwmon->regmap_pvt, PVT_SENSOR_STAT, &data);
84 if (ret < 0)
85 return ret;
86
87 if (!(data & SENSOR_STAT_DATA_VALID))
88 return -ENODATA;
89
90 *val = polynomial_calc(&poly_N_to_temp,
91 FIELD_GET(SENSOR_STAT_DATA, data));
92
93 return 0;
94 }
95
lan966x_hwmon_read_fan(struct device * dev,long * val)96 static int lan966x_hwmon_read_fan(struct device *dev, long *val)
97 {
98 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
99 unsigned int data;
100 int ret;
101
102 ret = regmap_read(hwmon->regmap_fan, FAN_CNT, &data);
103 if (ret < 0)
104 return ret;
105
106 /*
107 * Data is given in pulses per second. Assume two pulses
108 * per revolution.
109 */
110 *val = FIELD_GET(FAN_CNT_DATA, data) * 60 / 2;
111
112 return 0;
113 }
114
lan966x_hwmon_read_pwm(struct device * dev,long * val)115 static int lan966x_hwmon_read_pwm(struct device *dev, long *val)
116 {
117 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
118 unsigned int data;
119 int ret;
120
121 ret = regmap_read(hwmon->regmap_fan, FAN_CFG, &data);
122 if (ret < 0)
123 return ret;
124
125 *val = FIELD_GET(FAN_CFG_DUTY_CYCLE, data);
126
127 return 0;
128 }
129
lan966x_hwmon_read_pwm_freq(struct device * dev,long * val)130 static int lan966x_hwmon_read_pwm_freq(struct device *dev, long *val)
131 {
132 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
133 unsigned long tmp;
134 unsigned int data;
135 int ret;
136
137 ret = regmap_read(hwmon->regmap_fan, FAN_PWM_FREQ, &data);
138 if (ret < 0)
139 return ret;
140
141 /*
142 * Datasheet says it is sys_clk / 256 / pwm_freq. But in reality
143 * it is sys_clk / 256 / (pwm_freq + 1).
144 */
145 data = FIELD_GET(FAN_PWM_FREQ_FREQ, data) + 1;
146 tmp = DIV_ROUND_CLOSEST(hwmon->clk_rate, 256);
147 *val = DIV_ROUND_CLOSEST(tmp, data);
148
149 return 0;
150 }
151
lan966x_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)152 static int lan966x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
153 u32 attr, int channel, long *val)
154 {
155 switch (type) {
156 case hwmon_temp:
157 return lan966x_hwmon_read_temp(dev, val);
158 case hwmon_fan:
159 return lan966x_hwmon_read_fan(dev, val);
160 case hwmon_pwm:
161 switch (attr) {
162 case hwmon_pwm_input:
163 return lan966x_hwmon_read_pwm(dev, val);
164 case hwmon_pwm_freq:
165 return lan966x_hwmon_read_pwm_freq(dev, val);
166 default:
167 return -EOPNOTSUPP;
168 }
169 default:
170 return -EOPNOTSUPP;
171 }
172 }
173
lan966x_hwmon_write_pwm(struct device * dev,long val)174 static int lan966x_hwmon_write_pwm(struct device *dev, long val)
175 {
176 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
177
178 if (val < 0 || val > 255)
179 return -EINVAL;
180
181 return regmap_update_bits(hwmon->regmap_fan, FAN_CFG,
182 FAN_CFG_DUTY_CYCLE,
183 FIELD_PREP(FAN_CFG_DUTY_CYCLE, val));
184 }
185
lan966x_hwmon_write_pwm_freq(struct device * dev,long val)186 static int lan966x_hwmon_write_pwm_freq(struct device *dev, long val)
187 {
188 struct lan966x_hwmon *hwmon = dev_get_drvdata(dev);
189
190 if (val <= 0)
191 return -EINVAL;
192
193 val = DIV_ROUND_CLOSEST(hwmon->clk_rate, val);
194 val = DIV_ROUND_CLOSEST(val, 256) - 1;
195 val = clamp_val(val, 0, FAN_PWM_FREQ_FREQ);
196
197 return regmap_update_bits(hwmon->regmap_fan, FAN_PWM_FREQ,
198 FAN_PWM_FREQ_FREQ,
199 FIELD_PREP(FAN_PWM_FREQ_FREQ, val));
200 }
201
lan966x_hwmon_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)202 static int lan966x_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
203 u32 attr, int channel, long val)
204 {
205 switch (type) {
206 case hwmon_pwm:
207 switch (attr) {
208 case hwmon_pwm_input:
209 return lan966x_hwmon_write_pwm(dev, val);
210 case hwmon_pwm_freq:
211 return lan966x_hwmon_write_pwm_freq(dev, val);
212 default:
213 return -EOPNOTSUPP;
214 }
215 default:
216 return -EOPNOTSUPP;
217 }
218 }
219
lan966x_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)220 static umode_t lan966x_hwmon_is_visible(const void *data,
221 enum hwmon_sensor_types type,
222 u32 attr, int channel)
223 {
224 umode_t mode = 0;
225
226 switch (type) {
227 case hwmon_temp:
228 switch (attr) {
229 case hwmon_temp_input:
230 mode = 0444;
231 break;
232 default:
233 break;
234 }
235 break;
236 case hwmon_fan:
237 switch (attr) {
238 case hwmon_fan_input:
239 mode = 0444;
240 break;
241 default:
242 break;
243 }
244 break;
245 case hwmon_pwm:
246 switch (attr) {
247 case hwmon_pwm_input:
248 case hwmon_pwm_freq:
249 mode = 0644;
250 break;
251 default:
252 break;
253 }
254 break;
255 default:
256 break;
257 }
258
259 return mode;
260 }
261
262 static const struct hwmon_channel_info * const lan966x_hwmon_info[] = {
263 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
264 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
265 HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT),
266 HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT | HWMON_PWM_FREQ),
267 NULL
268 };
269
270 static const struct hwmon_ops lan966x_hwmon_ops = {
271 .is_visible = lan966x_hwmon_is_visible,
272 .read = lan966x_hwmon_read,
273 .write = lan966x_hwmon_write,
274 };
275
276 static const struct hwmon_chip_info lan966x_hwmon_chip_info = {
277 .ops = &lan966x_hwmon_ops,
278 .info = lan966x_hwmon_info,
279 };
280
lan966x_hwmon_disable(void * data)281 static void lan966x_hwmon_disable(void *data)
282 {
283 struct lan966x_hwmon *hwmon = data;
284
285 regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
286 SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE,
287 0);
288 }
289
lan966x_hwmon_enable(struct device * dev,struct lan966x_hwmon * hwmon)290 static int lan966x_hwmon_enable(struct device *dev,
291 struct lan966x_hwmon *hwmon)
292 {
293 unsigned int mask = SENSOR_CFG_CLK_CFG |
294 SENSOR_CFG_SAMPLE_ENA |
295 SENSOR_CFG_START_CAPTURE |
296 SENSOR_CFG_CONTINIOUS_MODE |
297 SENSOR_CFG_PSAMPLE_ENA;
298 unsigned int val;
299 unsigned int div;
300 int ret;
301
302 /* enable continuous mode */
303 val = SENSOR_CFG_SAMPLE_ENA | SENSOR_CFG_CONTINIOUS_MODE;
304
305 /* set PVT clock to be between 1.15 and 1.25 MHz */
306 div = DIV_ROUND_CLOSEST(hwmon->clk_rate, LAN966X_PVT_CLK);
307 val |= FIELD_PREP(SENSOR_CFG_CLK_CFG, div);
308
309 ret = regmap_update_bits(hwmon->regmap_pvt, PVT_SENSOR_CFG,
310 mask, val);
311 if (ret)
312 return ret;
313
314 return devm_add_action_or_reset(dev, lan966x_hwmon_disable, hwmon);
315 }
316
lan966x_init_regmap(struct platform_device * pdev,const char * name)317 static struct regmap *lan966x_init_regmap(struct platform_device *pdev,
318 const char *name)
319 {
320 struct regmap_config regmap_config = {
321 .reg_bits = 32,
322 .reg_stride = 4,
323 .val_bits = 32,
324 };
325 void __iomem *base;
326
327 base = devm_platform_ioremap_resource_byname(pdev, name);
328 if (IS_ERR(base))
329 return ERR_CAST(base);
330
331 regmap_config.name = name;
332
333 return devm_regmap_init_mmio(&pdev->dev, base, ®map_config);
334 }
335
lan966x_hwmon_probe(struct platform_device * pdev)336 static int lan966x_hwmon_probe(struct platform_device *pdev)
337 {
338 struct device *dev = &pdev->dev;
339 struct lan966x_hwmon *hwmon;
340 struct device *hwmon_dev;
341 int ret;
342
343 hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
344 if (!hwmon)
345 return -ENOMEM;
346
347 hwmon->clk = devm_clk_get_enabled(dev, NULL);
348 if (IS_ERR(hwmon->clk))
349 return dev_err_probe(dev, PTR_ERR(hwmon->clk),
350 "failed to get clock\n");
351
352 hwmon->clk_rate = clk_get_rate(hwmon->clk);
353
354 hwmon->regmap_pvt = lan966x_init_regmap(pdev, "pvt");
355 if (IS_ERR(hwmon->regmap_pvt))
356 return dev_err_probe(dev, PTR_ERR(hwmon->regmap_pvt),
357 "failed to get regmap for PVT registers\n");
358
359 hwmon->regmap_fan = lan966x_init_regmap(pdev, "fan");
360 if (IS_ERR(hwmon->regmap_fan))
361 return dev_err_probe(dev, PTR_ERR(hwmon->regmap_fan),
362 "failed to get regmap for fan registers\n");
363
364 ret = lan966x_hwmon_enable(dev, hwmon);
365 if (ret)
366 return dev_err_probe(dev, ret, "failed to enable sensor\n");
367
368 hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
369 "lan966x_hwmon", hwmon,
370 &lan966x_hwmon_chip_info, NULL);
371 if (IS_ERR(hwmon_dev))
372 return dev_err_probe(dev, PTR_ERR(hwmon_dev),
373 "failed to register hwmon device\n");
374
375 return 0;
376 }
377
378 static const struct of_device_id lan966x_hwmon_of_match[] = {
379 { .compatible = "microchip,lan9668-hwmon" },
380 {}
381 };
382 MODULE_DEVICE_TABLE(of, lan966x_hwmon_of_match);
383
384 static struct platform_driver lan966x_hwmon_driver = {
385 .probe = lan966x_hwmon_probe,
386 .driver = {
387 .name = "lan966x-hwmon",
388 .of_match_table = lan966x_hwmon_of_match,
389 },
390 };
391 module_platform_driver(lan966x_hwmon_driver);
392
393 MODULE_DESCRIPTION("LAN966x Hardware Monitoring Driver");
394 MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
395 MODULE_LICENSE("GPL");
396