1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
4 *
5 * Description: CoreSight Embedded Trace Buffer driver
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/types.h>
12 #include <linux/device.h>
13 #include <linux/io.h>
14 #include <linux/err.h>
15 #include <linux/fs.h>
16 #include <linux/miscdevice.h>
17 #include <linux/uaccess.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/seq_file.h>
22 #include <linux/coresight.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
25 #include <linux/circ_buf.h>
26 #include <linux/mm.h>
27 #include <linux/perf_event.h>
28
29
30 #include "coresight-priv.h"
31 #include "coresight-etm-perf.h"
32
33 #define ETB_RAM_DEPTH_REG 0x004
34 #define ETB_STATUS_REG 0x00c
35 #define ETB_RAM_READ_DATA_REG 0x010
36 #define ETB_RAM_READ_POINTER 0x014
37 #define ETB_RAM_WRITE_POINTER 0x018
38 #define ETB_TRG 0x01c
39 #define ETB_CTL_REG 0x020
40 #define ETB_RWD_REG 0x024
41 #define ETB_FFSR 0x300
42 #define ETB_FFCR 0x304
43 #define ETB_ITMISCOP0 0xee0
44 #define ETB_ITTRFLINACK 0xee4
45 #define ETB_ITTRFLIN 0xee8
46 #define ETB_ITATBDATA0 0xeeC
47 #define ETB_ITATBCTR2 0xef0
48 #define ETB_ITATBCTR1 0xef4
49 #define ETB_ITATBCTR0 0xef8
50
51 /* register description */
52 /* STS - 0x00C */
53 #define ETB_STATUS_RAM_FULL BIT(0)
54 /* CTL - 0x020 */
55 #define ETB_CTL_CAPT_EN BIT(0)
56 /* FFCR - 0x304 */
57 #define ETB_FFCR_EN_FTC BIT(0)
58 #define ETB_FFCR_FON_MAN BIT(6)
59 #define ETB_FFCR_STOP_FI BIT(12)
60 #define ETB_FFCR_STOP_TRIGGER BIT(13)
61
62 #define ETB_FFCR_BIT 6
63 #define ETB_FFSR_BIT 1
64 #define ETB_FRAME_SIZE_WORDS 4
65
66 /**
67 * struct etb_drvdata - specifics associated to an ETB component
68 * @base: memory mapped base address for this component.
69 * @atclk: optional clock for the core parts of the ETB.
70 * @csdev: component vitals needed by the framework.
71 * @miscdev: specifics to handle "/dev/xyz.etb" entry.
72 * @spinlock: only one at a time pls.
73 * @reading: synchronise user space access to etb buffer.
74 * @pid: Process ID of the process being monitored by the session
75 * that is using this component.
76 * @buf: area of memory where ETB buffer content gets sent.
77 * @buffer_depth: size of @buf.
78 * @trigger_cntr: amount of words to store after a trigger.
79 */
80 struct etb_drvdata {
81 void __iomem *base;
82 struct clk *atclk;
83 struct coresight_device *csdev;
84 struct miscdevice miscdev;
85 raw_spinlock_t spinlock;
86 local_t reading;
87 pid_t pid;
88 u8 *buf;
89 u32 buffer_depth;
90 u32 trigger_cntr;
91 };
92
93 static int etb_set_buffer(struct coresight_device *csdev,
94 struct perf_output_handle *handle);
95
etb_get_buffer_depth(struct etb_drvdata * drvdata)96 static unsigned int etb_get_buffer_depth(struct etb_drvdata *drvdata)
97 {
98 return readl_relaxed(drvdata->base + ETB_RAM_DEPTH_REG);
99 }
100
__etb_enable_hw(struct etb_drvdata * drvdata)101 static void __etb_enable_hw(struct etb_drvdata *drvdata)
102 {
103 int i;
104 u32 depth;
105
106 CS_UNLOCK(drvdata->base);
107
108 depth = drvdata->buffer_depth;
109 /* reset write RAM pointer address */
110 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
111 /* clear entire RAM buffer */
112 for (i = 0; i < depth; i++)
113 writel_relaxed(0x0, drvdata->base + ETB_RWD_REG);
114
115 /* reset write RAM pointer address */
116 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
117 /* reset read RAM pointer address */
118 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
119
120 writel_relaxed(drvdata->trigger_cntr, drvdata->base + ETB_TRG);
121 writel_relaxed(ETB_FFCR_EN_FTC | ETB_FFCR_STOP_TRIGGER,
122 drvdata->base + ETB_FFCR);
123 /* ETB trace capture enable */
124 writel_relaxed(ETB_CTL_CAPT_EN, drvdata->base + ETB_CTL_REG);
125
126 CS_LOCK(drvdata->base);
127 }
128
etb_enable_hw(struct etb_drvdata * drvdata)129 static int etb_enable_hw(struct etb_drvdata *drvdata)
130 {
131 int rc = coresight_claim_device(drvdata->csdev);
132
133 if (rc)
134 return rc;
135
136 __etb_enable_hw(drvdata);
137 return 0;
138 }
139
etb_enable_sysfs(struct coresight_device * csdev)140 static int etb_enable_sysfs(struct coresight_device *csdev)
141 {
142 int ret = 0;
143 unsigned long flags;
144 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
145
146 raw_spin_lock_irqsave(&drvdata->spinlock, flags);
147
148 /* Don't messup with perf sessions. */
149 if (coresight_get_mode(csdev) == CS_MODE_PERF) {
150 ret = -EBUSY;
151 goto out;
152 }
153
154 if (coresight_get_mode(csdev) == CS_MODE_DISABLED) {
155 ret = etb_enable_hw(drvdata);
156 if (ret)
157 goto out;
158
159 coresight_set_mode(csdev, CS_MODE_SYSFS);
160 }
161
162 csdev->refcnt++;
163 out:
164 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
165 return ret;
166 }
167
etb_enable_perf(struct coresight_device * csdev,struct coresight_path * path)168 static int etb_enable_perf(struct coresight_device *csdev, struct coresight_path *path)
169 {
170 int ret = 0;
171 pid_t pid;
172 unsigned long flags;
173 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
174 struct perf_output_handle *handle = path->handle;
175 struct cs_buffers *buf = etm_perf_sink_config(handle);
176
177 raw_spin_lock_irqsave(&drvdata->spinlock, flags);
178
179 /* No need to continue if the component is already in used by sysFS. */
180 if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) {
181 ret = -EBUSY;
182 goto out;
183 }
184
185 /* Get a handle on the pid of the process to monitor */
186 pid = buf->pid;
187
188 if (drvdata->pid != -1 && drvdata->pid != pid) {
189 ret = -EBUSY;
190 goto out;
191 }
192
193 /*
194 * No HW configuration is needed if the sink is already in
195 * use for this session.
196 */
197 if (drvdata->pid == pid) {
198 csdev->refcnt++;
199 goto out;
200 }
201
202 /*
203 * We don't have an internal state to clean up if we fail to setup
204 * the perf buffer. So we can perform the step before we turn the
205 * ETB on and leave without cleaning up.
206 */
207 ret = etb_set_buffer(csdev, handle);
208 if (ret)
209 goto out;
210
211 ret = etb_enable_hw(drvdata);
212 if (!ret) {
213 /* Associate with monitored process. */
214 drvdata->pid = pid;
215 coresight_set_mode(drvdata->csdev, CS_MODE_PERF);
216 csdev->refcnt++;
217 }
218
219 out:
220 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
221 return ret;
222 }
223
etb_enable(struct coresight_device * csdev,enum cs_mode mode,struct coresight_path * path)224 static int etb_enable(struct coresight_device *csdev, enum cs_mode mode,
225 struct coresight_path *path)
226 {
227 int ret;
228
229 switch (mode) {
230 case CS_MODE_SYSFS:
231 ret = etb_enable_sysfs(csdev);
232 break;
233 case CS_MODE_PERF:
234 ret = etb_enable_perf(csdev, path);
235 break;
236 default:
237 ret = -EINVAL;
238 break;
239 }
240
241 if (ret)
242 return ret;
243
244 dev_dbg(&csdev->dev, "ETB enabled\n");
245 return 0;
246 }
247
__etb_disable_hw(struct etb_drvdata * drvdata)248 static void __etb_disable_hw(struct etb_drvdata *drvdata)
249 {
250 u32 ffcr;
251 struct device *dev = &drvdata->csdev->dev;
252 struct csdev_access *csa = &drvdata->csdev->access;
253
254 CS_UNLOCK(drvdata->base);
255
256 ffcr = readl_relaxed(drvdata->base + ETB_FFCR);
257 /* stop formatter when a stop has completed */
258 ffcr |= ETB_FFCR_STOP_FI;
259 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
260 /* manually generate a flush of the system */
261 ffcr |= ETB_FFCR_FON_MAN;
262 writel_relaxed(ffcr, drvdata->base + ETB_FFCR);
263
264 if (coresight_timeout(csa, ETB_FFCR, ETB_FFCR_BIT, 0)) {
265 dev_err(dev,
266 "timeout while waiting for completion of Manual Flush\n");
267 }
268
269 /* disable trace capture */
270 writel_relaxed(0x0, drvdata->base + ETB_CTL_REG);
271
272 if (coresight_timeout(csa, ETB_FFSR, ETB_FFSR_BIT, 1)) {
273 dev_err(dev,
274 "timeout while waiting for Formatter to Stop\n");
275 }
276
277 CS_LOCK(drvdata->base);
278 }
279
etb_dump_hw(struct etb_drvdata * drvdata)280 static void etb_dump_hw(struct etb_drvdata *drvdata)
281 {
282 bool lost = false;
283 int i;
284 u8 *buf_ptr;
285 u32 read_data, depth;
286 u32 read_ptr, write_ptr;
287 u32 frame_off, frame_endoff;
288 struct device *dev = &drvdata->csdev->dev;
289
290 CS_UNLOCK(drvdata->base);
291
292 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
293 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
294
295 frame_off = write_ptr % ETB_FRAME_SIZE_WORDS;
296 frame_endoff = ETB_FRAME_SIZE_WORDS - frame_off;
297 if (frame_off) {
298 dev_err(dev,
299 "write_ptr: %lu not aligned to formatter frame size\n",
300 (unsigned long)write_ptr);
301 dev_err(dev, "frameoff: %lu, frame_endoff: %lu\n",
302 (unsigned long)frame_off, (unsigned long)frame_endoff);
303 write_ptr += frame_endoff;
304 }
305
306 if ((readl_relaxed(drvdata->base + ETB_STATUS_REG)
307 & ETB_STATUS_RAM_FULL) == 0) {
308 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
309 } else {
310 writel_relaxed(write_ptr, drvdata->base + ETB_RAM_READ_POINTER);
311 lost = true;
312 }
313
314 depth = drvdata->buffer_depth;
315 buf_ptr = drvdata->buf;
316 for (i = 0; i < depth; i++) {
317 read_data = readl_relaxed(drvdata->base +
318 ETB_RAM_READ_DATA_REG);
319 *(u32 *)buf_ptr = read_data;
320 buf_ptr += 4;
321 }
322
323 if (lost)
324 coresight_insert_barrier_packet(drvdata->buf);
325
326 if (frame_off) {
327 buf_ptr -= (frame_endoff * 4);
328 for (i = 0; i < frame_endoff; i++) {
329 *buf_ptr++ = 0x0;
330 *buf_ptr++ = 0x0;
331 *buf_ptr++ = 0x0;
332 *buf_ptr++ = 0x0;
333 }
334 }
335
336 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
337
338 CS_LOCK(drvdata->base);
339 }
340
etb_disable_hw(struct etb_drvdata * drvdata)341 static void etb_disable_hw(struct etb_drvdata *drvdata)
342 {
343 __etb_disable_hw(drvdata);
344 etb_dump_hw(drvdata);
345 coresight_disclaim_device(drvdata->csdev);
346 }
347
etb_disable(struct coresight_device * csdev)348 static int etb_disable(struct coresight_device *csdev)
349 {
350 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
351 unsigned long flags;
352
353 raw_spin_lock_irqsave(&drvdata->spinlock, flags);
354
355 csdev->refcnt--;
356 if (csdev->refcnt) {
357 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
358 return -EBUSY;
359 }
360
361 /* Complain if we (somehow) got out of sync */
362 WARN_ON_ONCE(coresight_get_mode(csdev) == CS_MODE_DISABLED);
363 etb_disable_hw(drvdata);
364 /* Dissociate from monitored process. */
365 drvdata->pid = -1;
366 coresight_set_mode(csdev, CS_MODE_DISABLED);
367 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
368
369 dev_dbg(&csdev->dev, "ETB disabled\n");
370 return 0;
371 }
372
etb_alloc_buffer(struct coresight_device * csdev,struct perf_event * event,void ** pages,int nr_pages,bool overwrite)373 static void *etb_alloc_buffer(struct coresight_device *csdev,
374 struct perf_event *event, void **pages,
375 int nr_pages, bool overwrite)
376 {
377 int node;
378 struct cs_buffers *buf;
379
380 node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu);
381
382 buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
383 if (!buf)
384 return NULL;
385
386 buf->pid = task_pid_nr(event->owner);
387 buf->snapshot = overwrite;
388 buf->nr_pages = nr_pages;
389 buf->data_pages = pages;
390
391 return buf;
392 }
393
etb_free_buffer(void * config)394 static void etb_free_buffer(void *config)
395 {
396 struct cs_buffers *buf = config;
397
398 kfree(buf);
399 }
400
etb_set_buffer(struct coresight_device * csdev,struct perf_output_handle * handle)401 static int etb_set_buffer(struct coresight_device *csdev,
402 struct perf_output_handle *handle)
403 {
404 int ret = 0;
405 unsigned long head;
406 struct cs_buffers *buf = etm_perf_sink_config(handle);
407
408 if (!buf)
409 return -EINVAL;
410
411 /* wrap head around to the amount of space we have */
412 head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
413
414 /* find the page to write to */
415 buf->cur = head / PAGE_SIZE;
416
417 /* and offset within that page */
418 buf->offset = head % PAGE_SIZE;
419
420 local_set(&buf->data_size, 0);
421
422 return ret;
423 }
424
etb_update_buffer(struct coresight_device * csdev,struct perf_output_handle * handle,void * sink_config)425 static unsigned long etb_update_buffer(struct coresight_device *csdev,
426 struct perf_output_handle *handle,
427 void *sink_config)
428 {
429 bool lost = false;
430 int i, cur;
431 u8 *buf_ptr;
432 const u32 *barrier;
433 u32 read_ptr, write_ptr, capacity;
434 u32 status, read_data;
435 unsigned long offset, to_read = 0, flags;
436 struct cs_buffers *buf = sink_config;
437 struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
438
439 if (!buf)
440 return 0;
441
442 capacity = drvdata->buffer_depth * ETB_FRAME_SIZE_WORDS;
443
444 raw_spin_lock_irqsave(&drvdata->spinlock, flags);
445
446 /* Don't do anything if another tracer is using this sink */
447 if (csdev->refcnt != 1)
448 goto out;
449
450 __etb_disable_hw(drvdata);
451 CS_UNLOCK(drvdata->base);
452
453 /* unit is in words, not bytes */
454 read_ptr = readl_relaxed(drvdata->base + ETB_RAM_READ_POINTER);
455 write_ptr = readl_relaxed(drvdata->base + ETB_RAM_WRITE_POINTER);
456
457 /*
458 * Entries should be aligned to the frame size. If they are not
459 * go back to the last alignment point to give decoding tools a
460 * chance to fix things.
461 */
462 if (write_ptr % ETB_FRAME_SIZE_WORDS) {
463 dev_err(&csdev->dev,
464 "write_ptr: %lu not aligned to formatter frame size\n",
465 (unsigned long)write_ptr);
466
467 write_ptr &= ~(ETB_FRAME_SIZE_WORDS - 1);
468 lost = true;
469 }
470
471 /*
472 * Get a hold of the status register and see if a wrap around
473 * has occurred. If so adjust things accordingly. Otherwise
474 * start at the beginning and go until the write pointer has
475 * been reached.
476 */
477 status = readl_relaxed(drvdata->base + ETB_STATUS_REG);
478 if (status & ETB_STATUS_RAM_FULL) {
479 lost = true;
480 to_read = capacity;
481 read_ptr = write_ptr;
482 } else {
483 to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->buffer_depth);
484 to_read *= ETB_FRAME_SIZE_WORDS;
485 }
486
487 /*
488 * Make sure we don't overwrite data that hasn't been consumed yet.
489 * It is entirely possible that the HW buffer has more data than the
490 * ring buffer can currently handle. If so adjust the start address
491 * to take only the last traces.
492 *
493 * In snapshot mode we are looking to get the latest traces only and as
494 * such, we don't care about not overwriting data that hasn't been
495 * processed by user space.
496 */
497 if (!buf->snapshot && to_read > handle->size) {
498 u32 mask = ~(ETB_FRAME_SIZE_WORDS - 1);
499
500 /* The new read pointer must be frame size aligned */
501 to_read = handle->size & mask;
502 /*
503 * Move the RAM read pointer up, keeping in mind that
504 * everything is in frame size units.
505 */
506 read_ptr = (write_ptr + drvdata->buffer_depth) -
507 to_read / ETB_FRAME_SIZE_WORDS;
508 /* Wrap around if need be*/
509 if (read_ptr > (drvdata->buffer_depth - 1))
510 read_ptr -= drvdata->buffer_depth;
511 /* let the decoder know we've skipped ahead */
512 lost = true;
513 }
514
515 /*
516 * Don't set the TRUNCATED flag in snapshot mode because 1) the
517 * captured buffer is expected to be truncated and 2) a full buffer
518 * prevents the event from being re-enabled by the perf core,
519 * resulting in stale data being send to user space.
520 */
521 if (!buf->snapshot && lost)
522 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
523
524 /* finally tell HW where we want to start reading from */
525 writel_relaxed(read_ptr, drvdata->base + ETB_RAM_READ_POINTER);
526
527 cur = buf->cur;
528 offset = buf->offset;
529 barrier = coresight_barrier_pkt;
530
531 for (i = 0; i < to_read; i += 4) {
532 buf_ptr = buf->data_pages[cur] + offset;
533 read_data = readl_relaxed(drvdata->base +
534 ETB_RAM_READ_DATA_REG);
535 if (lost && i < CORESIGHT_BARRIER_PKT_SIZE) {
536 read_data = *barrier;
537 barrier++;
538 }
539
540 *(u32 *)buf_ptr = read_data;
541 buf_ptr += 4;
542
543 offset += 4;
544 if (offset >= PAGE_SIZE) {
545 offset = 0;
546 cur++;
547 /* wrap around at the end of the buffer */
548 cur &= buf->nr_pages - 1;
549 }
550 }
551
552 /* reset ETB buffer for next run */
553 writel_relaxed(0x0, drvdata->base + ETB_RAM_READ_POINTER);
554 writel_relaxed(0x0, drvdata->base + ETB_RAM_WRITE_POINTER);
555
556 /*
557 * In snapshot mode we simply increment the head by the number of byte
558 * that were written. User space will figure out how many bytes to get
559 * from the AUX buffer based on the position of the head.
560 */
561 if (buf->snapshot)
562 handle->head += to_read;
563
564 __etb_enable_hw(drvdata);
565 CS_LOCK(drvdata->base);
566 out:
567 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
568
569 return to_read;
570 }
571
572 static const struct coresight_ops_sink etb_sink_ops = {
573 .enable = etb_enable,
574 .disable = etb_disable,
575 .alloc_buffer = etb_alloc_buffer,
576 .free_buffer = etb_free_buffer,
577 .update_buffer = etb_update_buffer,
578 };
579
580 static const struct coresight_ops etb_cs_ops = {
581 .sink_ops = &etb_sink_ops,
582 };
583
etb_dump(struct etb_drvdata * drvdata)584 static void etb_dump(struct etb_drvdata *drvdata)
585 {
586 unsigned long flags;
587
588 raw_spin_lock_irqsave(&drvdata->spinlock, flags);
589 if (coresight_get_mode(drvdata->csdev) == CS_MODE_SYSFS) {
590 __etb_disable_hw(drvdata);
591 etb_dump_hw(drvdata);
592 __etb_enable_hw(drvdata);
593 }
594 raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
595
596 dev_dbg(&drvdata->csdev->dev, "ETB dumped\n");
597 }
598
etb_open(struct inode * inode,struct file * file)599 static int etb_open(struct inode *inode, struct file *file)
600 {
601 struct etb_drvdata *drvdata = container_of(file->private_data,
602 struct etb_drvdata, miscdev);
603
604 if (local_cmpxchg(&drvdata->reading, 0, 1))
605 return -EBUSY;
606
607 dev_dbg(&drvdata->csdev->dev, "%s: successfully opened\n", __func__);
608 return 0;
609 }
610
etb_read(struct file * file,char __user * data,size_t len,loff_t * ppos)611 static ssize_t etb_read(struct file *file, char __user *data,
612 size_t len, loff_t *ppos)
613 {
614 u32 depth;
615 struct etb_drvdata *drvdata = container_of(file->private_data,
616 struct etb_drvdata, miscdev);
617 struct device *dev = &drvdata->csdev->dev;
618
619 etb_dump(drvdata);
620
621 depth = drvdata->buffer_depth;
622 if (*ppos + len > depth * 4)
623 len = depth * 4 - *ppos;
624
625 if (copy_to_user(data, drvdata->buf + *ppos, len)) {
626 dev_dbg(dev,
627 "%s: copy_to_user failed\n", __func__);
628 return -EFAULT;
629 }
630
631 *ppos += len;
632
633 dev_dbg(dev, "%s: %zu bytes copied, %d bytes left\n",
634 __func__, len, (int)(depth * 4 - *ppos));
635 return len;
636 }
637
etb_release(struct inode * inode,struct file * file)638 static int etb_release(struct inode *inode, struct file *file)
639 {
640 struct etb_drvdata *drvdata = container_of(file->private_data,
641 struct etb_drvdata, miscdev);
642 local_set(&drvdata->reading, 0);
643
644 dev_dbg(&drvdata->csdev->dev, "%s: released\n", __func__);
645 return 0;
646 }
647
648 static const struct file_operations etb_fops = {
649 .owner = THIS_MODULE,
650 .open = etb_open,
651 .read = etb_read,
652 .release = etb_release,
653 };
654
655 static struct attribute *coresight_etb_mgmt_attrs[] = {
656 coresight_simple_reg32(rdp, ETB_RAM_DEPTH_REG),
657 coresight_simple_reg32(sts, ETB_STATUS_REG),
658 coresight_simple_reg32(rrp, ETB_RAM_READ_POINTER),
659 coresight_simple_reg32(rwp, ETB_RAM_WRITE_POINTER),
660 coresight_simple_reg32(trg, ETB_TRG),
661 coresight_simple_reg32(ctl, ETB_CTL_REG),
662 coresight_simple_reg32(ffsr, ETB_FFSR),
663 coresight_simple_reg32(ffcr, ETB_FFCR),
664 NULL,
665 };
666
trigger_cntr_show(struct device * dev,struct device_attribute * attr,char * buf)667 static ssize_t trigger_cntr_show(struct device *dev,
668 struct device_attribute *attr, char *buf)
669 {
670 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
671 unsigned long val = drvdata->trigger_cntr;
672
673 return sprintf(buf, "%#lx\n", val);
674 }
675
trigger_cntr_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t size)676 static ssize_t trigger_cntr_store(struct device *dev,
677 struct device_attribute *attr,
678 const char *buf, size_t size)
679 {
680 int ret;
681 unsigned long val;
682 struct etb_drvdata *drvdata = dev_get_drvdata(dev->parent);
683
684 ret = kstrtoul(buf, 16, &val);
685 if (ret)
686 return ret;
687
688 drvdata->trigger_cntr = val;
689 return size;
690 }
691 static DEVICE_ATTR_RW(trigger_cntr);
692
693 static struct attribute *coresight_etb_attrs[] = {
694 &dev_attr_trigger_cntr.attr,
695 NULL,
696 };
697
698 static const struct attribute_group coresight_etb_group = {
699 .attrs = coresight_etb_attrs,
700 };
701
702 static const struct attribute_group coresight_etb_mgmt_group = {
703 .attrs = coresight_etb_mgmt_attrs,
704 .name = "mgmt",
705 };
706
707 static const struct attribute_group *coresight_etb_groups[] = {
708 &coresight_etb_group,
709 &coresight_etb_mgmt_group,
710 NULL,
711 };
712
etb_probe(struct amba_device * adev,const struct amba_id * id)713 static int etb_probe(struct amba_device *adev, const struct amba_id *id)
714 {
715 int ret;
716 void __iomem *base;
717 struct device *dev = &adev->dev;
718 struct coresight_platform_data *pdata = NULL;
719 struct etb_drvdata *drvdata;
720 struct resource *res = &adev->res;
721 struct coresight_desc desc = { 0 };
722
723 desc.name = coresight_alloc_device_name("etb", dev);
724 if (!desc.name)
725 return -ENOMEM;
726
727 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
728 if (!drvdata)
729 return -ENOMEM;
730
731 drvdata->atclk = devm_clk_get_optional_enabled(dev, "atclk");
732 if (IS_ERR(drvdata->atclk))
733 return PTR_ERR(drvdata->atclk);
734
735 dev_set_drvdata(dev, drvdata);
736
737 /* validity for the resource is already checked by the AMBA core */
738 base = devm_ioremap_resource(dev, res);
739 if (IS_ERR(base))
740 return PTR_ERR(base);
741
742 drvdata->base = base;
743 desc.access = CSDEV_ACCESS_IOMEM(base);
744
745 raw_spin_lock_init(&drvdata->spinlock);
746
747 drvdata->buffer_depth = etb_get_buffer_depth(drvdata);
748
749 if (drvdata->buffer_depth & 0x80000000)
750 return -EINVAL;
751
752 drvdata->buf = devm_kcalloc(dev,
753 drvdata->buffer_depth, 4, GFP_KERNEL);
754 if (!drvdata->buf)
755 return -ENOMEM;
756
757 /* This device is not associated with a session */
758 drvdata->pid = -1;
759
760 pdata = coresight_get_platform_data(dev);
761 if (IS_ERR(pdata))
762 return PTR_ERR(pdata);
763 adev->dev.platform_data = pdata;
764
765 desc.type = CORESIGHT_DEV_TYPE_SINK;
766 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
767 desc.ops = &etb_cs_ops;
768 desc.pdata = pdata;
769 desc.dev = dev;
770 desc.groups = coresight_etb_groups;
771
772 coresight_clear_self_claim_tag(&desc.access);
773 drvdata->csdev = coresight_register(&desc);
774 if (IS_ERR(drvdata->csdev))
775 return PTR_ERR(drvdata->csdev);
776
777 drvdata->miscdev.name = desc.name;
778 drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
779 drvdata->miscdev.fops = &etb_fops;
780 ret = misc_register(&drvdata->miscdev);
781 if (ret)
782 goto err_misc_register;
783
784 pm_runtime_put(&adev->dev);
785 return 0;
786
787 err_misc_register:
788 coresight_unregister(drvdata->csdev);
789 return ret;
790 }
791
etb_remove(struct amba_device * adev)792 static void etb_remove(struct amba_device *adev)
793 {
794 struct etb_drvdata *drvdata = dev_get_drvdata(&adev->dev);
795
796 /*
797 * Since misc_open() holds a refcount on the f_ops, which is
798 * etb fops in this case, device is there until last file
799 * handler to this device is closed.
800 */
801 misc_deregister(&drvdata->miscdev);
802 coresight_unregister(drvdata->csdev);
803 }
804
805 #ifdef CONFIG_PM
etb_runtime_suspend(struct device * dev)806 static int etb_runtime_suspend(struct device *dev)
807 {
808 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
809
810 clk_disable_unprepare(drvdata->atclk);
811
812 return 0;
813 }
814
etb_runtime_resume(struct device * dev)815 static int etb_runtime_resume(struct device *dev)
816 {
817 struct etb_drvdata *drvdata = dev_get_drvdata(dev);
818
819 return clk_prepare_enable(drvdata->atclk);
820 }
821 #endif
822
823 static const struct dev_pm_ops etb_dev_pm_ops = {
824 SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL)
825 };
826
827 static const struct amba_id etb_ids[] = {
828 {
829 .id = 0x000bb907,
830 .mask = 0x000fffff,
831 },
832 { 0, 0, NULL },
833 };
834
835 MODULE_DEVICE_TABLE(amba, etb_ids);
836
837 static struct amba_driver etb_driver = {
838 .drv = {
839 .name = "coresight-etb10",
840 .pm = &etb_dev_pm_ops,
841 .suppress_bind_attrs = true,
842
843 },
844 .probe = etb_probe,
845 .remove = etb_remove,
846 .id_table = etb_ids,
847 };
848
849 module_amba_driver(etb_driver);
850
851 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
852 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
853 MODULE_DESCRIPTION("Arm CoreSight Embedded Trace Buffer driver");
854 MODULE_LICENSE("GPL v2");
855