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Searched refs:DSCC_PPS_CONFIG2 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c129 REG_GET(DSCC_PPS_CONFIG2, PIC_WIDTH, &s->dsc_pic_width); in dsc401_read_state()
130 REG_GET(DSCC_PPS_CONFIG2, PIC_HEIGHT, &s->dsc_pic_height); in dsc401_read_state()
289 REG_SET_2(DSCC_PPS_CONFIG2, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h214 uint32_t DSCC_PPS_CONFIG2; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c158 REG_GET(DSCC_PPS_CONFIG2, PIC_WIDTH, &s->dsc_pic_width); in dsc2_read_state()
159 REG_GET(DSCC_PPS_CONFIG2, PIC_HEIGHT, &s->dsc_pic_height); in dsc2_read_state()
649 REG_SET_2(DSCC_PPS_CONFIG2, 0, in dsc_write_to_registers()
H A Ddcn20_dsc.h43 SRI(DSCC_PPS_CONFIG2, DSCC, id),\
470 uint32_t DSCC_PPS_CONFIG2; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h427 SRI_ARR(DSCC_PPS_CONFIG2, DSCC, id), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h728 SRI_ARR(DSCC_PPS_CONFIG2, DSCC, id), \