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Searched refs:DRAMClockChangeSupport (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
562 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.c4282 enum clock_change_support *DRAMClockChangeSupport, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
4576 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4578 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4580 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4583 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4585 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4587 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4590 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4592 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4594 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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H A Ddisplay_mode_vba_util_32.h827 enum clock_change_support *DRAMClockChangeSupport,
H A Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported) in mode_support_configuration()
3608 &v->DRAMClockChangeSupport[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core.c3038 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3040 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3042 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3044 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3048 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3050 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3052 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr_w_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3054 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3058 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3060 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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H A Ddisplay_mode_util.c492 if (!fail_only || support->DRAMClockChangeSupport[j] == dml_dram_clock_change_unsupported) in dml_print_dml_mode_support_info()
493 …("DML: support: combine=%d, DRAMClockChangeSupport = %d\n", j, support->DRAMClockChangeSupport[j]); in dml_print_dml_mode_support_info()
H A Ddisplay_mode_core_structs.h773 enum dml_dram_clock_change_support DRAMClockChangeSupport[2]; member
1253 enum dml_dram_clock_change_support DRAMClockChangeSupport; member
1381 enum dml_dram_clock_change_support *DRAMClockChangeSupport; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c744 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp) in dcn32_subvp_vblank_admissable()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c284 enum clock_change_support *DRAMClockChangeSupport);
2606 enum clock_change_support DRAMClockChangeSupport = 0; // dummy in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2626 &DRAMClockChangeSupport); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4836 &v->DRAMClockChangeSupport[i][j]); in dml30_ModeSupportAndSystemConfigurationFull()
4969 enum clock_change_support *DRAMClockChangeSupport) in CalculateWatermarksAndDRAMSpeedChangeSupport() argument
5109 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5111 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5113 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in CalculateWatermarksAndDRAMSpeedChangeSupport()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h847 enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES][2]; member
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1646 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dcn30_internal_validate_bw()
1672 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) { in dcn30_internal_validate_bw()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c6876 p->DRAMClockChangeSupport[k] = dml2_pstate_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6880 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vblank_and_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6882 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6884 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6886 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6888 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6890 p->DRAMClockChangeSupport[k] = dml2_pstate_change_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6892 p->DRAMClockChangeSupport[k] = dml2_pstate_change_mall_svp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6894 p->DRAMClockChangeSupport[k] = dml2_pstate_change_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6896 if (p->DRAMClockChangeSupport[k] == dml2_pstate_change_unsupported) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c649 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()