Home
last modified time | relevance | path

Searched refs:DRAMClockChangeSupport (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.c133 if (p->cur_mode_support_info->DRAMClockChangeSupport[0] == dml_dram_clock_change_unsupported) { in optimize_configuration()
271 if (dml_result && s->evaluation_info.DRAMClockChangeSupport[0] == dml_dram_clock_change_vactive) { in calculate_lowest_supported_state_for_temp_read()
451 …} else if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && … in optimize_pstate_with_svp_and_drr()
482 if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported) { in optimize_pstate_with_svp_and_drr()
483 …idate_static_schedulability(dml2, display_state, s->mode_support_info.DRAMClockChangeSupport[0])) { in optimize_pstate_with_svp_and_drr()
502 …if (result && s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported)… in optimize_pstate_with_svp_and_drr()
628 …out_clks.p_state_supported = s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_chan… in dml2_validate_and_build_resource()
804 …*dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport… in dml2_extract_dram_and_fclk_change_support()
H A Ddisplay_mode_util.c492 if (!fail_only || support->DRAMClockChangeSupport[j] == dml_dram_clock_change_unsupported) in dml_print_dml_mode_support_info()
493 …("DML: support: combine=%d, DRAMClockChangeSupport = %d\n", j, support->DRAMClockChangeSupport[j]); in dml_print_dml_mode_support_info()
H A Ddisplay_mode_core_structs.h716 enum dml_dram_clock_change_support DRAMClockChangeSupport[2]; member
1196 enum dml_dram_clock_change_support DRAMClockChangeSupport; member
1324 enum dml_dram_clock_change_support *DRAMClockChangeSupport; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c284 …enum clock_change_support temp_clock_change_support = vba->DRAMClockChangeSupport[vlevel][context-… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
290 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
296 if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported && in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
298 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
301 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
1081 …} else if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vactive_w_… in subvp_validate_static_schedulability()
1488 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) || in dcn32_full_validate_bw_helper()
1489 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported || in dcn32_full_validate_bw_helper()
1528 if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) { in dcn32_full_validate_bw_helper()
1560 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; in dcn32_full_validate_bw_helper()
[all …]
H A Ddisplay_mode_vba_util_32.h827 enum clock_change_support *DRAMClockChangeSupport,
H A Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported) in mode_support_configuration()
3608 &v->DRAMClockChangeSupport[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c388 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clo… in dcn30_fpu_calculate_wm_and_dlg()
421 …pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_ch… in dcn30_fpu_calculate_wm_and_dlg()
490 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] == in dcn30_fpu_calculate_wm_and_dlg()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h255 enum dml2_dram_clock_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
801 enum dml2_dram_clock_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
1548 enum dml2_dram_clock_change_support *DRAMClockChangeSupport; member
H A Ddml2_core_shared.c2700 CalculateWatermarks_params->DRAMClockChangeSupport = mode_lib->ms.support.DRAMClockChangeSupport; in dml2_core_shared_mode_support()
8892 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8895 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank_and_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8897 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8899 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8901 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8903 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8905 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8907 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_svp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
8909 p->DRAMClockChangeSupport[k] = dml2_dram_clock_change_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
562 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
H A Ddisplay_mode_vba_31.c312 enum clock_change_support *DRAMClockChangeSupport,
2933 enum clock_change_support DRAMClockChangeSupport; // dummy local
2954 &DRAMClockChangeSupport,
5364 &v->DRAMClockChangeSupport[i][j],
5562 enum clock_change_support *DRAMClockChangeSupport, argument
5726 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5729 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5731 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c744 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp) in dcn32_subvp_vblank_admissable()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h847 enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES][2]; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1165 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn20_calculate_dlg_params()