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Searched refs:DPCS_BASE__INST0_SEG5 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Ddimgrey_cavefish_ip_offset.h415 #define DPCS_BASE__INST0_SEG5 0 macro
H A Dbeige_goby_ip_offset.h493 #define DPCS_BASE__INST0_SEG5 0 macro
H A Dyellow_carp_offset.h439 #define DPCS_BASE__INST0_SEG5 0 macro
H A Dvangogh_ip_offset.h511 #define DPCS_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c110 #define DPCS_BASE__INST0_SEG5 0 macro
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c98 #define DPCS_BASE__INST0_SEG5 0 macro