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Searched refs:DIV_CLK_FPLL_DDR01_1 (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dsophgo,sg2042-clkgen.h11 #define DIV_CLK_FPLL_DDR01_1 2 macro
/linux/drivers/clk/sophgo/
H A Dclk-sg2042-clkgen.c474 SG2042_DIV_HWS_RO(DIV_CLK_FPLL_DDR01_1,