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Searched refs:DIV (Results 1 – 25 of 41) sorted by relevance

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/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c57 DIV(CLK_MIPS_INTERNAL_DIV, "mips_internal_div", "mips_pll_mux",
59 DIV(CLK_MIPS_DIV, "mips_div", "mips_internal_div", 0x208, 8),
68 DIV(CLK_RPU_V_DIV, "rpu_v_div", "rpu_v_pll_mux", 0x21c, 2),
69 DIV(CLK_RPU_L_DIV, "rpu_l_div", "rpu_l_mux", 0x220, 2),
70 DIV(CLK_RPU_SLEEP_DIV, "rpu_sleep_div", "xtal", 0x224, 10),
71 DIV(CLK_RPU_CORE_DIV, "rpu_core_div", "rpu_core_mux", 0x228, 3),
72 DIV(CLK_USB_PHY_DIV, "usb_phy_div", "sys_internal_div", 0x22c, 6),
73 DIV(CLK_ENET_DIV, "enet_div", "enet_mux", 0x230, 6),
82 DIV(CLK_SYS_INTERNAL_DIV, "sys_internal_div", "sys_pll_mux", 0x244, 3),
83 DIV(CLK_SPI0_INTERNAL_DIV, "spi0_internal_div", "sys_pll_mux",
[all …]
H A Dclk.h59 #define DIV(_id, _name, _pname, _reg, _width) \ macro
/linux/drivers/clk/samsung/
H A Dclk-exynosautov920.c761 DIV(DOUT_CLKCMU_CMU_BOOST, "dout_clkcmu_cmu_boost",
765 DIV(DOUT_CLKCMU_ACC_NOC, "dout_clkcmu_acc_noc",
767 DIV(DOUT_CLKCMU_ACC_ORB, "dout_clkcmu_acc_orb",
771 DIV(DOUT_CLKCMU_APM_NOC, "dout_clkcmu_apm_noc",
775 DIV(DOUT_CLKCMU_AUD_CPU, "dout_clkcmu_aud_cpu",
777 DIV(DOUT_CLKCMU_AUD_NOC, "dout_clkcmu_aud_noc",
781 DIV(DOUT_CLKCMU_CPUCL0_SWITCH, "dout_clkcmu_cpucl0_switch",
784 DIV(DOUT_CLKCMU_CPUCL0_CLUSTER, "dout_clkcmu_cpucl0_cluster",
787 DIV(DOUT_CLKCMU_CPUCL0_DBG, "dout_clkcmu_cpucl0_dbg",
792 DIV(DOUT_CLKCMU_CPUCL1_SWITCH, "dout_clkcmu_cpucl1_switch",
[all …]
H A Dclk-artpec8.c291 DIV(CLK_DOUT_SHARED0_DIV2, "dout_pll_shared0_div2",
293 DIV(CLK_DOUT_SHARED0_DIV3, "dout_pll_shared0_div3",
295 DIV(CLK_DOUT_SHARED0_DIV4, "dout_pll_shared0_div4",
297 DIV(CLK_DOUT_SHARED1_DIV2, "dout_pll_shared1_div2",
299 DIV(CLK_DOUT_SHARED1_DIV3, "dout_pll_shared1_div3",
301 DIV(CLK_DOUT_SHARED1_DIV4, "dout_pll_shared1_div4",
303 DIV(CLK_DOUT_CMU_BUS, "dout_clkcmu_bus",
305 DIV(CLK_DOUT_CMU_BUS_DLP, "dout_clkcmu_bus_dlp",
307 DIV(CLK_DOUT_CMU_CORE_MAIN, "dout_clkcmu_core_main",
309 DIV(CLK_DOUT_CMU_CORE_DLP, "dout_clkcmu_core_dlp",
[all …]
H A Dclk-exynos4.c594 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
595 DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
596 DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus",
599 DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
600 DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
601 DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus",
604 DIV(0, "div_core", "mout_core", DIV_CPU0, 0, 3),
605 DIV(0, "div_corem0", "div_core2", DIV_CPU0, 4, 3),
606 DIV(0, "div_corem1", "div_core2", DIV_CPU0, 8, 3),
607 DIV(0, "div_periph", "div_core2", DIV_CPU0, 12, 3),
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H A Dclk-exynos990.c868 DIV(CLK_DOUT_CMU_SHARED0_DIV2, "dout_cmu_shared0_div2", "mout_pll_shared0",
870 DIV(CLK_DOUT_CMU_SHARED0_DIV3, "dout_cmu_shared0_div3", "mout_pll_shared0",
872 DIV(CLK_DOUT_CMU_SHARED0_DIV4, "dout_cmu_shared0_div4", "dout_cmu_shared0_div2",
876 DIV(CLK_DOUT_CMU_SHARED1_DIV2, "dout_cmu_shared1_div2", "mout_pll_shared1",
878 DIV(CLK_DOUT_CMU_SHARED1_DIV3, "dout_cmu_shared1_div3", "mout_pll_shared1",
880 DIV(CLK_DOUT_CMU_SHARED1_DIV4, "dout_cmu_shared1_div4", "dout_cmu_shared1_div2",
884 DIV(CLK_DOUT_CMU_SHARED2_DIV2, "dout_cmu_shared2_div2", "mout_pll_shared2",
888 DIV(CLK_DOUT_CMU_SHARED4_DIV2, "dout_cmu_shared4_div2", "mout_pll_shared4",
890 DIV(CLK_DOUT_CMU_SHARED4_DIV3, "dout_cmu_shared4_div3", "mout_pll_shared4",
892 DIV(CLK_DOUT_CMU_SHARED4_DIV4, "dout_cmu_shared4_div4", "mout_pll_shared4",
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H A Dclk-fsd.c213 DIV(0, "dout_cmu_cis0_clk", "cmu_cis0_clkgate", DIV_CMU_CIS0_CLK, 0, 4),
214 DIV(0, "dout_cmu_cis1_clk", "cmu_cis1_clkgate", DIV_CMU_CIS1_CLK, 0, 4),
215 DIV(0, "dout_cmu_cis2_clk", "cmu_cis2_clkgate", DIV_CMU_CIS2_CLK, 0, 4),
216 DIV(0, "dout_cmu_cmu_aclk", "dout_cmu_pll_shared1_div9", DIV_CMU_CMU_ACLK, 0, 4),
217 DIV(0, "dout_cmu_cpucl_switch", "cmu_cpucl_switch_gate", DIV_CMU_CPUCL_SWITCH, 0, 4),
218 DIV(DOUT_CMU_FSYS0_SHARED0DIV4, "dout_cmu_fsys0_shared0div4", "cmu_fsys0_shared0div4_gate",
220 DIV(0, "dout_cmu_fsys0_shared1div3", "cmu_fsys0_shared1div4_clk",
222 DIV(DOUT_CMU_FSYS0_SHARED1DIV4, "dout_cmu_fsys0_shared1div4", "cmu_fsys0_shared1div4_gate",
224 DIV(DOUT_CMU_FSYS1_SHARED0DIV4, "dout_cmu_fsys1_shared0div4", "cmu_fsys1_shared0div4_gate",
226 DIV(DOUT_CMU_FSYS1_SHARED0DIV8, "dout_cmu_fsys1_shared0div8", "cmu_fsys1_shared1div4_gate",
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/linux/drivers/clk/bcm/
H A Dclk-kona.h57 #define divider_exists(div) FLAG_TEST(div, DIV, EXISTS)
58 #define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED)
287 .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED), \
297 .flags = FLAG(DIV, EXISTS), \
308 .flags = FLAG(DIV, EXISTS), \
/linux/arch/alpha/lib/
H A Dev6-divide.S71 #ifdef DIV
166 #ifdef DIV
175 #ifdef DIV
202 #ifdef DIV
H A Ddivide.S61 #ifdef DIV
/linux/arch/m68k/mac/
H A Dmisc.c581 #define DIV(a, b) ((a) / (b) - ((a) % (b) < 0)) in unmktime() macro
582 #define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400)) in unmktime()
/linux/drivers/clk/rockchip/
H A Dclk-rk3368.c294 DIV(0, "aclkm_core_b", "armclkb", 0,
296 DIV(0, "atclk_core_b", "armclkb", 0,
298 DIV(0, "pclk_dbg_b", "armclkb", 0,
301 DIV(0, "aclkm_core_l", "armclkl", 0,
303 DIV(0, "atclk_core_l", "armclkl", 0,
305 DIV(0, "pclk_dbg_l", "armclkl", 0,
440 DIV(0, "hclk_vio", "aclk_vio0", 0,
493 DIV(0, "pclk_pd_alive", "gpll", 0,
H A Dclk-rk3228.c216 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
305 DIV(HCLK_VIO_PRE, "hclk_vio_pre", "aclk_iep_pre", 0,
389 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
395 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
408 DIV(DCLK_HDMI_PHY, "dclk_hdmiphy", "sclk_vop_src", 0,
410 DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
H A Dclk-rk3036.c218 DIV(0, "pclk_peri_src", "aclk_peri_src", CLK_IGNORE_UNUSED,
222 DIV(0, "hclk_peri_src", "aclk_peri_src", CLK_IGNORE_UNUSED,
287 DIV(SCLK_SDMMC, "sclk_sdmmc", "sclk_sdmmc_src", 0,
293 DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
H A Dclk-rk3288.c340 DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLK_SET_RATE_PARENT,
474 DIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,
490 DIV(0, "pclk_pd_alive", "gpll", 0,
656 DIV(0, "hsicphy12m_usbphy", "sclk_hsicphy480m", 0,
827 DIV(0, "hclk_vio", "aclk_vio1", 0,
832 DIV(0, "hclk_vio", "aclk_vio0", 0,
H A Dclk-rk3128.c205 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
325 DIV(SCLK_PVTM, "clk_pvtm", "clk_pvtm_func", 0,
348 DIV(SCLK_CIF_OUT, "sclk_cif_out", "sclk_cif_out_src", 0,
H A Dclk-rk3328.c269 DIV(0, "clk_24m", "xin24m", CLK_IGNORE_UNUSED,
572 DIV(HCLK_VIO_PRE, "hclk_vio_pre", "aclk_vio_pre", 0,
596 DIV(DCLK_HDMIPHY, "dclk_hdmiphy", "dclk_lcdc_src", 0,
/linux/Documentation/devicetree/bindings/clock/st/
H A Dst,flexgen.txt46 | | ch2|----|-->| | | DIV | | DIV | | |
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dintroduction.rst208 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
209 MUL.D MULH.D MULH.DU DIV.D DIV.DU MOD.D MOD.DU
/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dintroduction.rst208 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
209 MUL.D MULH.D MULH.DU DIV.D DIV.DU MOD.D MOD.DU
/linux/drivers/usb/serial/
H A Diuu_phoenix.c396 u8 DIV = 0; /* 8bit */ in iuu_clk() local
420 DIV = 100; in iuu_clk()
425 DIV = 105; in iuu_clk()
430 DIV = 66; in iuu_clk()
462 DIV = lDiv; in iuu_clk()
483 priv->buf[Count++] = DIV; /* Adr = 0x0C */ in iuu_clk()
/linux/Documentation/sound/hd-audio/
H A Drealtek-pc-beep.rst54 1Ah input selection (DIV is the PC Beep divider set on NID 01h)::
58 +--DIV--+--!DIV--+ {1Ah boost control}
/linux/drivers/clk/sophgo/
H A DKconfig29 This driver provides clock function such as DIV/Mux/Gate.
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst241 MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU
242 MUL.D MULH.D MULH.DU DIV.D DIV.DU MOD.D MOD.DU
/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c81 #define DIV F3(2, 0x0e) /* udiv */ macro
459 emit_alu_K(DIV, K); in bpf_jit_compile()
481 emit_alu_X(DIV); in bpf_jit_compile()

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