Searched refs:DISP_CC_MDSS_BYTE1_INTF_CLK (Results 1 – 16 of 16) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | qcom,dispcc-sdm845.h | 17 #define DISP_CC_MDSS_BYTE1_INTF_CLK 7 macro
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| H A D | qcom,dispcc-sm8350.h | 19 #define DISP_CC_MDSS_BYTE1_INTF_CLK 9 macro
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| H A D | qcom,dispcc-sm8250.h | 19 #define DISP_CC_MDSS_BYTE1_INTF_CLK 9 macro
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| H A D | qcom,dispcc-sm8150.h | 19 #define DISP_CC_MDSS_BYTE1_INTF_CLK 9 macro
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| H A D | qcom,x1e80100-dispcc.h | 21 #define DISP_CC_MDSS_BYTE1_INTF_CLK 11 macro
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| H A D | qcom,dispcc-sc8280xp.h | 24 #define DISP_CC_MDSS_BYTE1_INTF_CLK 14 macro
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| H A D | qcom,sm8550-dispcc.h | 21 #define DISP_CC_MDSS_BYTE1_INTF_CLK 11 macro
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| H A D | qcom,sm8450-dispcc.h | 20 #define DISP_CC_MDSS_BYTE1_INTF_CLK 10 macro
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| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sdm845.c | 781 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-sm8250.c | 1168 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-sc8280xp.c | 2893 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp0_cc_mdss_byte1_intf_clk.clkr,
2975 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp1_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-x1e80100.c | 1549 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-sm8450.c | 1688 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-sm8550.c | 1657 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| H A D | dispcc-sm8750.c | 1794 [DISP_CC_MDSS_BYTE1_INTF_CLK] = &disp_cc_mdss_byte1_intf_clk.clkr,
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm845.dtsi | 4772 <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
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