Searched refs:DISP_CC_MDSS_BYTE1_CLK (Results 1 – 16 of 16) sorted by relevance
/linux/include/dt-bindings/clock/ |
H A D | qcom,dispcc-sdm845.h | 15 #define DISP_CC_MDSS_BYTE1_CLK 5 macro
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H A D | qcom,dispcc-sm8350.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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H A D | qcom,dispcc-sm8250.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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H A D | qcom,dispcc-sm8150.h | 16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
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H A D | qcom,x1e80100-dispcc.h | 18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
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H A D | qcom,dispcc-sc8280xp.h | 21 #define DISP_CC_MDSS_BYTE1_CLK 11 macro
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H A D | qcom,sm8550-dispcc.h | 18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
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H A D | qcom,sm8450-dispcc.h | 17 #define DISP_CC_MDSS_BYTE1_CLK 7 macro
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/linux/drivers/clk/qcom/ |
H A D | dispcc-sdm845.c | 779 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-sm8250.c | 1165 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-sc8280xp.c | 2890 [DISP_CC_MDSS_BYTE1_CLK] = &disp0_cc_mdss_byte1_clk.clkr, 2972 [DISP_CC_MDSS_BYTE1_CLK] = &disp1_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-x1e80100.c | 1546 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-sm8450.c | 1685 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-sm8550.c | 1654 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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H A D | dispcc-sm8750.c | 1791 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm845.dtsi | 4771 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
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