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Searched refs:DCFCLKState (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_32.c3008 mode_lib->vba.DCFCLKState[i][j] = mode_lib->vba.DCFCLKPerState[i]; in dml32_ModeSupportAndSystemConfigurationFull()
3125 mode_lib->vba.DCFCLKState); in dml32_ModeSupportAndSystemConfigurationFull()
3131 mode_lib->vba.HostVMEnable, mode_lib->vba.DCFCLKState[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
3142 / mode_lib->vba.DCFCLKState[i][j] in dml32_ModeSupportAndSystemConfigurationFull()
3162 dml_min3(mode_lib->vba.ReturnBusWidth * mode_lib->vba.DCFCLKState[i][j] in dml32_ModeSupportAndSystemConfigurationFull()
3245 mode_lib->vba.DCFCLKState[i][j], mode_lib->vba.FabricClockPerState[i], in dml32_ModeSupportAndSystemConfigurationFull()
3255 mode_lib->vba.DCFCLKState[i][j], mode_lib->vba.TotalNumberOfActiveDPP[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
3335 (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= DCFCLK_FREQ_EXTRA_PREFETCH_REQ_MHZ) ? in dml32_ModeSupportAndSystemConfigurationFull()
3603 v->DCFCLKState[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
3747 mode_lib->vba.DCFCLK = mode_lib->vba.DCFCLKState[mode_li in dml32_ModeSupportAndSystemConfigurationFull()
[all...]
H A Ddisplay_mode_vba_util_32.h644 double DCFCLKState[][2]);
H A Ddcn32_fpu.c482 unsigned int dcfclk = (unsigned int)context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn32_set_phantom_stream_timing()
2282 double dcfclk_from_validation = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn32_calculate_wm_and_dlg_fpu()
2372 dcfclk_from_fw_based_mclk_switching = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn32_calculate_wm_and_dlg_fpu()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c490 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h827 …dml_float_t DCFCLKState[2]; /// <brief recommended DCFCLK freq; calculated by DML. If UseMinimumRe… member
1325 dml_float_t *DCFCLKState; member
H A Ddisplay_mode_core.c4754 p->DCFCLKState[j] = dml_min(p->DCFCLKPerState, 1.05 * dml_max(s->DCFCLKRequiredForAverageBandwidth, s->DCFCLKRequiredForPeakBandwidth)); in CalculateSurfaceSizeInMall()
6423 mode_lib->ms.DCFCLKState[j], in dml_prefetch_check()
6434 mode_lib->ms.DCFCLKState[j], in dml_prefetch_check()
6764 CalculateWatermarks_params->DCFCLK = mode_lib->ms.DCFCLKState[j]; in set_vm_row_and_swath_parameters()
8022 mode_lib->ms.DCFCLKState[j] = mode_lib->ms.state.dcfclk_mhz; in dml_core_mode_support()
8125 UseMinimumDCFCLK_params->DCFCLKState = mode_lib->ms.DCFCLKState; in dml_core_mode_support()
8134 mode_lib->ms.cache_display_cfg.plane.HostVMEnable, mode_lib->ms.DCFCLKState[j], mode_lib->ms.state.fabricclk_mhz, in dml_core_mode_support()
8144 (mode_lib->ms.soc.round_trip_ping_latency_dcfclk_cycles + 32) / mode_lib->ms.DCFCLKState[j] + s->ReorderingBytes / mode_lib->ms.ReturnBWPerState[j]) { in dml_core_mode_support()
8159 mode_lib->ms.support.MaxTotalVerticalActiveAvailableBandwidth[j] = dml_min3(mode_lib->ms.soc.return_bus_width_bytes * mode_lib->ms.DCFCLKState[ in dml_core_mode_support()
[all...]
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h600 double DCFCLKState[DC__VOLTAGE_STATES][2]; member