| /linux/drivers/tty/serial/ |
| H A D | rsci.c | 28 #define CSR 0x48 macro
185 unsigned int status = rsci_serial_in(port, CSR); in rsci_tx_empty()
255 status = rsci_serial_in(port, CSR); in rsci_transmit_chars()
302 status = rsci_serial_in(port, CSR); in rsci_receive_chars()
345 rsci_serial_in(port, CSR); /* dummy read */ in rsci_receive_chars()
358 rsci_serial_in(port, CSR); /* dummy read */ in rsci_receive_chars()
368 ret = readl_relaxed_poll_timeout_atomic(port->membase + CSR, status, in rsci_poll_put_char()
409 .status = CSR,
421 .overrun_reg = CSR,
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| /linux/drivers/scsi/aacraid/ |
| H A D | aacraid.h | 1077 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1078 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1079 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) argument
1080 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) argument
1139 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) argument
1140 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) argument
1141 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) argument
1142 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) argument
1157 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) argument
1158 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) argument
[all …]
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| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | irq-chip-model.rst | 151 - CPUINTC：即《龍芯架構參考手冊卷一》第7.4節所描述的CSR.ECFG/CSR.ESTAT寄存器及其
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| H A D | introduction.rst | 262 直接映射虛擬內存通過CSR.DMWn（n=0~3）來進行配置，虛擬地址（VA）和物理地址（PA）
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| /linux/drivers/dma/ |
| H A D | txx9dmac.h | 78 TXX9_DMA_REG32(CSR); /* Channel Status Register */
88 u32 CSR; member
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| /linux/drivers/soc/litex/ |
| H A D | Kconfig | 15 LiteX CSR access and provides common litex_[read|write]*
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| /linux/arch/arm/mach-omap1/ |
| H A D | dma.c | 59 [CSR] = { 0x0006, 0x40, OMAP_DMA_REG_16BIT },
219 l = dma_read(CSR, lch); in omap1_clear_dma()
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| H A D | omap-dma.c | 74 p->dma_read(CSR, lch); in omap_disable_channel_irq()
312 p->dma_read(CSR, lch); in omap_enable_channel_irq()
698 csr = p->dma_read(CSR, ch); in omap1_dma_handle_ch()
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| /linux/drivers/gpib/include/ |
| H A D | tnt4882_registers.h | 28 CSR = KEYREG, enumerator
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| /linux/arch/arm/mach-omap2/ |
| H A D | dma.c | 57 [CSR] = { 0x008c, 0x60, OMAP_DMA_REG_32BIT },
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| /linux/Documentation/translations/zh_CN/arch/riscv/ |
| H A D | boot.rst | 34 CSR 寄存器状态
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-sirf.txt | 1 CSR SiRFprimaII pinmux controller
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| /linux/drivers/regulator/ |
| H A D | bcm590xx-regulator.c | 373 BCM59056_SR_DESC(CSR, csr, dcdc_csr_ranges),
750 BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges),
984 BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges),
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| /linux/Documentation/arch/arm/ |
| H A D | ixp4xx.rst | 39 require the use of Intel's proprietary CSR software:
140 the CSR or a WiFi card and a ramdisk that BOOTPs and then does
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| /linux/include/linux/ |
| H A D | omap-dma.h | 153 CSDP, CCR, CICR, CSR, enumerator
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| /linux/Documentation/admin-guide/perf/ |
| H A D | xgene-pmu.rst | 9 interrupt and status CSR region.
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| /linux/Documentation/driver-api/rapidio/ |
| H A D | rapidio.rst | 256 device by writing into the Host Device ID Lock CSR. It does this to ensure that
262 is written into the device's Base Device ID CSR.
279 into device's Component Tag CSR. That unique value is used by the error
291 in the system, it sets the Discovered bit in the Port General Control CSR
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| /linux/arch/arm/mach-tegra/ |
| H A D | sleep-tegra30.S | 235 ldr r3, [r1] @ read CSR
236 str r3, [r1] @ clear CSR
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| /linux/Documentation/translations/zh_CN/arch/loongarch/ |
| H A D | introduction.rst | 262 直接映射虚拟内存通过CSR.DMWn（n=0~3）来进行配置，虚拟地址（VA）和物理地址（PA）
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | snps,dwc-qos-ethernet.txt | 43 The CPU/slave-bus (CSR) interface clock. This applies to any bus type;
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| /linux/Documentation/arch/riscv/ |
| H A D | boot.rst | 29 CSR state
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| /linux/drivers/gpib/tnt4882/ |
| H A D | tnt4882_gpib.c | 88 case CSR: in tnt_readb()
980 switch (tnt_readb(tnt_priv, CSR) & 0xf0) { in ni_pci_attach()
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| /linux/drivers/net/ethernet/renesas/ |
| H A D | ravb_main.c | 77 error = ravb_wait(ndev, CSR, CSR_OPS, csr_ops); in ravb_set_opmode()
1094 error = ravb_wait(ndev, CSR, CSR_TPO0 | CSR_TPO1 | CSR_TPO2 | CSR_TPO3, in ravb_stop_dma()
1103 error = ravb_wait(ndev, CSR, CSR_RPO, 0); in ravb_stop_dma()
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| /linux/Documentation/arch/loongarch/ |
| H A D | introduction.rst | 295 Direct-mapped virtual memory is configured by CSR.DMWn (n=0~3), it has a simple
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| /linux/Documentation/networking/device_drivers/ethernet/stmicro/ |
| H A D | stmmac.rst | 368 6) Fixed CSR Clock Range selection::
|