Home
last modified time | relevance | path

Searched refs:CP_PQ_WPTR_POLL_CNTL (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dcikd.h1355 #define CP_PQ_WPTR_POLL_CNTL 0xC20C macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c2875 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v7_0_mqd_init()
2946 tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v7_0_mqd_commit()
H A Dgfx_v12_0.c3199 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v12_0_compute_mqd_init()
3260 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v12_0_kiq_init_register()
3320 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v12_0_kiq_init_register()
H A Dgfx_v11_0.c4329 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v11_0_compute_mqd_init()
4390 WREG32_FIELD15_PREREG(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v11_0_kiq_init_register()
4450 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v11_0_kiq_init_register()
H A Dgfx_v10_0.c6994 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v10_0_compute_mqd_init()
7034 WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); in gfx_v10_0_kiq_init_register()
7093 /* only used if CP_PQ_WPTR_POLL_CNTL.CP_PQ_WPTR_POLL_CNTL__EN_MASK=1 */ in gfx_v10_0_kiq_init_register()