/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v12_0.c | 1082 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1084 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1086 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1088 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1091 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_mqd_init() 1135 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_queue_init_register() 1431 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_kiq_dequeue_sched() 1433 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_kiq_dequeue_sched()
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H A D | mes_v11_0.c | 1155 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1157 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1159 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1161 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1164 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_mqd_init() 1201 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_queue_init_register() 1483 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_kiq_dequeue() 1485 data = REG_SET_FIELD(data, CP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_kiq_dequeue()
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H A D | amdgpu_amdkfd_gfx_v7.c | 183 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | amdgpu_amdkfd_gc_9_4_3.c | 308 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_gfx_v9_4_3_hqd_load()
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H A D | gfx_v12_0.c | 3038 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3040 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3042 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3044 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3047 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3100 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3103 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3105 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init() 3107 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_compute_mqd_init()
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H A D | amdgpu_amdkfd_gfx_v8.c | 207 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | amdgpu_amdkfd_gfx_v10_3.c | 219 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in hqd_load_v10_3()
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H A D | gfx_v11_0.c | 4130 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4132 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4134 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4136 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4139 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4193 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4196 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4198 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init() 4200 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v11_0_compute_mqd_init()
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H A D | amdgpu_amdkfd_gfx_v11.c | 204 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in hqd_load_v11()
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H A D | amdgpu_amdkfd_gfx_v10.c | 233 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_hqd_load()
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H A D | amdgpu_amdkfd_gfx_v9.c | 247 CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in kgd_gfx_v9_hqd_load()
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H A D | gfx_v8_0.c | 4438 CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4488 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4491 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4493 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init() 4495 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_mqd_init()
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H A D | gfx_v9_0.c | 3550 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3552 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3554 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3556 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init() 3559 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v9_0_mqd_init()
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H A D | gfx_v10_0.c | 6822 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6824 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6826 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6828 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init() 6831 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v10_0_compute_mqd_init()
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/linux/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1511 #define CP_HQD_PQ_DOORBELL_CONTROL 0xC950 macro
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H A D | cik.c | 4616 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume() 4621 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume() 4702 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume() 4713 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume()
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