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Searched refs:CPHYSADDR (Results 1 – 25 of 25) sorted by relevance

/linux/arch/mips/include/asm/
H A Daddrspace.h58 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) macro
78 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
79 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
80 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
81 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
85 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
86 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
87 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
88 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
93 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
[all …]
H A Dpage.h165 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); in ___pa()
175 return CPHYSADDR(x); in ___pa()
/linux/arch/mips/include/asm/mach-jazz/
H A Dfloppy.h67 vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a))); in fd_set_dma_addr()
111 vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */ in fd_dma_mem_alloc()
118 vdma_free(vdma_phys2log(CPHYSADDR(addr))); in fd_dma_mem_free()
/linux/include/linux/
H A Dlantiq.h14 #ifndef CPHYSADDR
15 #define CPHYSADDR(a) 0 macro
/linux/arch/mips/alchemy/devboards/
H A Dbcsr.c33 bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys)); in bcsr_init()
34 bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys)); in bcsr_init()
/linux/arch/mips/sibyte/common/
H A Dcfe.c89 initrd_pstart = CPHYSADDR(initrd_start); in prom_meminit()
90 initrd_pend = CPHYSADDR(initrd_end); in prom_meminit()
/linux/arch/mips/include/asm/mach-dec/
H A Dmc146818rtc.h20 #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
/linux/arch/mips/ralink/
H A Dprom.c50 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
H A Dmt7621.c68 if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE) in mt7621_addr_wraparound_test()
/linux/arch/mips/lantiq/xway/
H A Dvmmc.c36 (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE, in vmmc_probe()
/linux/arch/mips/dec/
H A Dtc.c45 tbus->slot_base = CPHYSADDR((long)rex_slot_address(0)); in tc_bus_get_info()
H A Dkn01-berr.c106 address = CPHYSADDR(vaddr); in dec_kn01_be_backend()
/linux/arch/mips/include/asm/mach-au1x00/
H A Dau1000_dma.h241 __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); in init_dma()
306 __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR); in set_dma_fifo_addr()
/linux/arch/mips/lantiq/
H A Dprom.c60 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
/linux/arch/mips/bcm47xx/
H A Dprom.c79 off = CPHYSADDR((unsigned long)prom_init); in prom_init_mem()
/linux/drivers/gpio/
H A Dgpio-mm-lantiq.c96 ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); in ltq_mm_save_regs()
/linux/arch/mips/alchemy/common/
H A Dplatform.c37 alchemy_uart_enable(CPHYSADDR(port->membase)); in alchemy_8250_pm()
42 alchemy_uart_disable(CPHYSADDR(port->membase)); in alchemy_8250_pm()
H A Dclock.c109 #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x))))
/linux/arch/mips/mm/
H A Dpage.c620 u64 to_phys = CPHYSADDR((unsigned long)page); in clear_page()
645 u64 from_phys = CPHYSADDR((unsigned long)from); in copy_page()
646 u64 to_phys = CPHYSADDR((unsigned long)to); in copy_page()
/linux/drivers/mtd/nand/raw/
H A Dxway_nand.c208 ltq_ebu_w32(CPHYSADDR(data->nandaddr) in xway_nand_probe()
/linux/arch/mips/pci/
H A Dpci-malta.c100 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); in mips_pcibios_init()
/linux/drivers/net/ethernet/
H A Dlantiq_etop.c117 CPHYSADDR(ch->skb[ch->dma.desc]->data); in ltq_etop_alloc_skb()
495 byte_offset = CPHYSADDR(skb->data) % (priv->tx_burst_len * 4); in ltq_etop_tx()
/linux/arch/mips/sgi-ip22/
H A Dip28-berr.c414 CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp); in ip28_be_interrupt()
/linux/drivers/tty/serial/
H A Dlantiq.c838 if (mmres->start == CPHYSADDR(LTQ_EARLY_ASC)) in lqasc_probe()
/linux/drivers/net/ethernet/amd/
H A Ddeclance.c1109 CPHYSADDR(dev->mem_start) << 3); in dec_lance_probe()