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/linux/Documentation/kbuild/
H A DKconfig.recursion-issue-0113 # * What values are possible for CORE?
15 # CORE_BELL_A_ADVANCED selects CORE, which means that it influences the values
16 # that are possible for CORE. So for example if CORE_BELL_A_ADVANCED is 'y',
17 # CORE must be 'y' too.
27 # CORE_BELL_A depends on CORE, so CORE influences CORE_BELL_A.
30 # what values are possible for CORE we ended up needing to address questions
31 # regarding possible values of CORE itself again. Answering the original
32 # question of what are the possible values of CORE would make the kconfig
38 # of the "select CORE" from CORE_BELL_A_ADVANCED as that is implicit already
39 # since CORE_BELL_A depends on CORE. Recursive dependency issues are not always
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H A DKconfig.recursion-issue-0225 # have. Let's assume we have some CORE functionality, then the kernel has a
32 # with CORE, one uses "depends on" while the other uses "select". Another
38 # To fix this the "depends on CORE" must be changed to "select CORE", or the
39 # "select CORE" must be changed to "depends on CORE".
49 config CORE config
54 depends on CORE
63 select CORE
/linux/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinitvals_init.h87 { MT_BBP(CORE, 1), 0x00000002 },
88 { MT_BBP(CORE, 4), 0x00000000 },
89 { MT_BBP(CORE, 24), 0x00000000 },
90 { MT_BBP(CORE, 32), 0x4003000a },
91 { MT_BBP(CORE, 42), 0x00000000 },
92 { MT_BBP(CORE, 44), 0x00000000 },
/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dmac.c37 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2_mac_stop()
38 mt76_clear(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2_mac_stop()
40 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2_mac_stop()
41 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2_mac_stop()
H A Dpci_phy.c83 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 2); in mt76x2_phy_set_antenna()
85 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 4); in mt76x2_phy_set_antenna()
94 mt76_rmw_field(dev, MT_BBP(CORE, 32), GENMASK(21, 20), 1); in mt76x2_phy_set_antenna()
96 mt76_rmw_field(dev, MT_BBP(CORE, 33), GENMASK(12, 9), 1); in mt76x2_phy_set_antenna()
107 mt76_clear(dev, MT_BBP(CORE, 32), GENMASK(21, 20)); in mt76x2_phy_set_antenna()
108 mt76_clear(dev, MT_BBP(CORE, 33), GENMASK(12, 9)); in mt76x2_phy_set_antenna()
H A Dusb_mac.c143 mt76_set(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2u_mac_stop()
144 mt76_clear(dev, MT_BBP(CORE, 4), BIT(1)); in mt76x2u_mac_stop()
146 mt76_set(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2u_mac_stop()
147 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0)); in mt76x2u_mac_stop()
/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt11 On Tegra20 SoC's there are 3 coupled regulators: CORE, RTC and CPU.
12 The CORE and RTC voltages shall be in a range of 170mV from each other
18 On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE
19 and CPU voltages shall be in a range of 300mV from each other and CORE
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-pro5-epcore.dts3 * Device Tree Source for UniPhier Pro5 EP-CORE Board (Pro5-PCIe_EP-CORE)
14 model = "UniPhier Pro5 EP-CORE Board";
/linux/drivers/media/platform/chips-media/wave5/
H A Dwave5-vdi.h24 #define vpu_read_reg(CORE, ADDR) wave5_vdi_read_register(CORE, ADDR) argument
/linux/drivers/infiniband/hw/hfi1/
H A Dchip_registers.h9 #define CORE 0x000000000000 macro
10 #define CCE (CORE + 0x000000000000)
11 #define ASIC (CORE + 0x000000400000)
12 #define MISC (CORE + 0x000000500000)
13 #define DC_TOP_CSRS (CORE + 0x000000600000)
14 #define CHIP_DEBUG (CORE + 0x000000700000)
15 #define RXE (CORE + 0x000001000000)
16 #define TXE (CORE + 0x000001800000)
/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-core-thermal.dtsi3 * Device Tree Source for OMAP543x SoC CORE thermal
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dcrcc57d.c18 u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crcc57d_set_src()
H A Dcrc907d.c31 u32 crc_args = NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crc907d_set_src()
H A Dbase907c.c166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
/linux/Documentation/devicetree/bindings/mfd/
H A Dda9052-i2c.txt19 buck1 : regulator BUCK CORE
/linux/drivers/regulator/
H A Dtps68470-regulator.c103 TPS68470_REGULATOR(CORE, TPS68470_CORE, tps68470_regulator_ops, 43,
/linux/drivers/net/wireless/mediatek/mt76/
H A Dmt76x02_phy.c143 mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val); in mt76x02_phy_set_bw()
/linux/arch/arm/mach-omap2/
H A Dsleep34xx.S354 cmp r4, #0x0 @ Check if previous power state of CORE is OFF
374 cmp r2, #0x0 @ Check if previous power state of CORE is OFF
/linux/Documentation/gpu/
H A Dkomeda-kms.rst328 achieve this, split the komeda device into two layers: CORE and CHIP.
330 - CORE: for common features and capabilities handling.
333 CORE can access CHIP by three chip function structures:
/linux/Documentation/arch/arm/omap/
H A Domap_pm.rst42 3. Set the maximum system DMA transfer start latency (CORE pwrdm)::
/linux/tools/perf/Documentation/
H A Dperf-amd-ibs.txt39 IBS VS. REGULAR CORE PMU
/linux/Documentation/driver-api/
H A Dvfio-mediated-device.rst58 | MDEV CORE |
/linux/drivers/tty/serial/jsm/
H A Djsm_tty.c396 jsm_dbg(CORE, &brd->pci_dev, in jsm_tty_init()
/linux/Documentation/RCU/
H A DwhatisRCU.rst39 :ref:`2. WHAT IS RCU'S CORE API? <2_whatisRCU>`
41 :ref:`3. WHAT ARE SOME EXAMPLE USES OF CORE RCU API? <3_whatisRCU>`
142 2. WHAT IS RCU'S CORE API?
433 3. WHAT ARE SOME EXAMPLE USES OF CORE RCU API?
/linux/Documentation/admin-guide/RAS/
H A Dmain.rst287 Controller (MC) driver modules. On a given system, the CORE is loaded
288 and one MC driver will be loaded. Both the CORE and the MC driver (or
293 both the CORE's and the MC driver's versions.

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