Home
last modified time | relevance | path

Searched refs:CORE (Results 1 – 25 of 34) sorted by relevance

12

/linux/Documentation/kbuild/
H A DKconfig.recursion-issue-0113 # * What values are possible for CORE?
15 # CORE_BELL_A_ADVANCED selects CORE, which means that it influences the values
16 # that are possible for CORE. So for example if CORE_BELL_A_ADVANCED is 'y',
17 # CORE must be 'y' too.
27 # CORE_BELL_A depends on CORE, so CORE influences CORE_BELL_A.
30 # what values are possible for CORE we ended up needing to address questions
31 # regarding possible values of CORE itself again. Answering the original
32 # question of what are the possible values of CORE would make the kconfig
38 # of the "select CORE" from CORE_BELL_A_ADVANCED as that is implicit already
39 # since CORE_BELL_A depends on CORE. Recursive dependency issues are not always
[all …]
H A DKconfig.recursion-issue-0225 # have. Let's assume we have some CORE functionality, then the kernel has a
32 # with CORE, one uses "depends on" while the other uses "select". Another
38 # To fix this the "depends on CORE" must be changed to "select CORE", or the
39 # "select CORE" must be changed to "depends on CORE".
49 config CORE config
54 depends on CORE
63 select CORE
/linux/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinitvals_init.h87 { MT_BBP(CORE, 1), 0x00000002 },
88 { MT_BBP(CORE, 4), 0x00000000 },
89 { MT_BBP(CORE, 24), 0x00000000 },
90 { MT_BBP(CORE, 32), 0x4003000a },
91 { MT_BBP(CORE, 42), 0x00000000 },
92 { MT_BBP(CORE, 44), 0x00000000 },
/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt11 On Tegra20 SoC's there are 3 coupled regulators: CORE, RTC and CPU.
12 The CORE and RTC voltages shall be in a range of 170mV from each other
18 On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE
19 and CPU voltages shall be in a range of 300mV from each other and CORE
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-pro5-epcore.dts3 * Device Tree Source for UniPhier Pro5 EP-CORE Board (Pro5-PCIe_EP-CORE)
14 model = "UniPhier Pro5 EP-CORE Board";
/linux/drivers/media/platform/chips-media/wave5/
H A Dwave5-vdi.h24 #define vpu_read_reg(CORE, ADDR) wave5_vdi_read_register(CORE, ADDR) argument
/linux/drivers/infiniband/hw/hfi1/
H A Dchip_registers.h9 #define CORE 0x000000000000 macro
10 #define CCE (CORE + 0x000000000000)
11 #define ASIC (CORE + 0x000000400000)
12 #define MISC (CORE + 0x000000500000)
13 #define DC_TOP_CSRS (CORE + 0x000000600000)
14 #define CHIP_DEBUG (CORE + 0x000000700000)
15 #define RXE (CORE + 0x000001000000)
16 #define TXE (CORE + 0x000001800000)
/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-core-thermal.dtsi3 * Device Tree Source for OMAP543x SoC CORE thermal
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dcrcc57d.c18 u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crcc57d_set_src()
H A Dcrc907d.c31 u32 crc_args = NVDEF(NV907D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) | in crc907d_set_src()
H A Dbase907c.c166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
/linux/drivers/clk/imx/
H A Dclk-imx8ulp-sim-lpav.c41 IMX8ULP_HIFI_CLK_GATE("hifi_core", CORE, "core", 17),
/linux/drivers/regulator/
H A Dtps68470-regulator.c103 TPS68470_REGULATOR(CORE, TPS68470_CORE, tps68470_regulator_ops, 43,
/linux/tools/perf/tests/shell/attr/
H A Dtest-stat-default203 # PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
H A Dtest-stat-detailed-1205 # PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
H A Dtest-stat-detailed-3205 # PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
H A Dtest-stat-detailed-2205 # PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
/linux/arch/arm/mach-omap2/
H A Dsleep34xx.S354 cmp r4, #0x0 @ Check if previous power state of CORE is OFF
374 cmp r2, #0x0 @ Check if previous power state of CORE is OFF
/linux/Documentation/gpu/
H A Dkomeda-kms.rst328 achieve this, split the komeda device into two layers: CORE and CHIP.
330 - CORE: for common features and capabilities handling.
333 CORE can access CHIP by three chip function structures:
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_n.c16309 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, in wlc_phy_workarounds_nphy_rev7()
16312 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, in wlc_phy_workarounds_nphy_rev7()
16315 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, in wlc_phy_workarounds_nphy_rev7()
16333 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16341 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16345 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16349 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16353 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16357 CORE, coreNum, in wlc_phy_workarounds_nphy_rev7()
16365 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, in wlc_phy_workarounds_nphy_rev7()
[all …]
/linux/Documentation/arch/arm/omap/
H A Domap_pm.rst42 3. Set the maximum system DMA transfer start latency (CORE pwrdm)::
/linux/tools/perf/Documentation/
H A Dperf-amd-ibs.txt39 IBS VS. REGULAR CORE PMU
/linux/Documentation/driver-api/
H A Dvfio-mediated-device.rst58 | MDEV CORE |
/linux/Documentation/gpu/nova/core/
H A Dfalcon.rst131 | | (FrameBuffer |<---->| CORE |----->. Direct Core Access
/linux/drivers/tty/serial/jsm/
H A Djsm_tty.c396 jsm_dbg(CORE, &brd->pci_dev, in jsm_tty_init()

12