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Searched refs:CLK_TOP_UNIVPLL_D6_D2 (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt8192-clk.h108 #define CLK_TOP_UNIVPLL_D6_D2 96 macro
H A Dmediatek,mt8188-clk.h132 #define CLK_TOP_UNIVPLL_D6_D2 121 macro
H A Dmt8195-clk.h165 #define CLK_TOP_UNIVPLL_D6_D2 153 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8188.dtsi1381 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1405 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1418 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1431 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1444 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1457 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
H A Dmt8195.dtsi1113 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1173 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1187 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1201 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1215 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1229 clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-topckgen.c56 FACTOR(CLK_TOP_UNIVPLL_D6_D2, "univpll_d6_d2", "univpll_d6", 1, 2),
H A Dclk-mt8192.c54 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D2, "univpll_d6_d2", "univpll_d6", 1, 2, 0),
H A Dclk-mt8195-topckgen.c67 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D6_D2, "univpll_d6_d2", "univpll_d6", 1, 2, 0),