| /linux/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 52 #define CLK_TOP_UNIVPLL_D3 41 macro
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| H A D | mt7629-clk.h | 53 #define CLK_TOP_UNIVPLL_D3 43 macro
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| H A D | mt8516-clk.h | 55 #define CLK_TOP_UNIVPLL_D3 23 macro
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| H A D | mt6797-clk.h | 71 #define CLK_TOP_UNIVPLL_D3 61 macro
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| H A D | mediatek,mt6795-clk.h | 74 #define CLK_TOP_UNIVPLL_D3 63 macro
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| H A D | mt8173-clk.h | 76 #define CLK_TOP_UNIVPLL_D3 66 macro
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| H A D | mt6765-clk.h | 60 #define CLK_TOP_UNIVPLL_D3 25 macro
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| H A D | mediatek,mt8365-clk.h | 35 #define CLK_TOP_UNIVPLL_D3 25 macro
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| H A D | mt6779-clk.h | 71 #define CLK_TOP_UNIVPLL_D3 61 macro
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| H A D | mt8183-clk.h | 96 #define CLK_TOP_UNIVPLL_D3 60 macro
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| H A D | mt2712-clk.h | 60 #define CLK_TOP_UNIVPLL_D3 29 macro
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| H A D | mt8186-clk.h | 104 #define CLK_TOP_UNIVPLL_D3 85 macro
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| H A D | mt2701-clk.h | 29 #define CLK_TOP_UNIVPLL_D3 19 macro
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| H A D | mt8192-clk.h | 98 #define CLK_TOP_UNIVPLL_D3 86 macro
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| H A D | mediatek,mt8188-clk.h | 122 #define CLK_TOP_UNIVPLL_D3 111 macro
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| H A D | mt8195-clk.h | 155 #define CLK_TOP_UNIVPLL_D3 143 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 430 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univ_416m", 1, 1, 0),
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| H A D | clk-mt8173-topckgen.c | 509 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univ_416m", 1, 1, 0),
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| H A D | clk-mt8135.c | 74 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll_416m", 1, 1),
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| H A D | clk-mt8186-topckgen.c | 39 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3, 0),
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| H A D | clk-mt8516.c | 50 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3),
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| H A D | clk-mt7629.c | 396 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3),
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| H A D | clk-mt8167.c | 53 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3),
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| H A D | clk-mt6797.c | 51 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3),
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| H A D | clk-mt2712.c | 68 FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll_ck", 1, 3),
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