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Searched refs:CLK_TOP_TL_P1 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8196-clock.h65 #define CLK_TOP_TL_P1 52 macro
H A Dmt8195-clk.h84 #define CLK_TOP_TL_P1 72 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8195-topckgen.c1055 MUX_GATE_CLR_SET_UPD(CLK_TOP_TL_P1, "top_tl_p1",
H A Dclk-mt8196-topckgen.c855 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_TL_P1, "tl_p1", tl_parents,