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Searched refs:CLK_TOP_SYSPLL4_D4 (Results 1 – 18 of 18) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h47 #define CLK_TOP_SYSPLL4_D4 37 macro
H A Dmt7622-clk.h40 #define CLK_TOP_SYSPLL4_D4 28 macro
H A Dmt6797-clk.h61 #define CLK_TOP_SYSPLL4_D4 51 macro
H A Dmediatek,mt6795-clk.h64 #define CLK_TOP_SYSPLL4_D4 53 macro
H A Dmt8173-clk.h66 #define CLK_TOP_SYSPLL4_D4 56 macro
H A Dmt6765-clk.h50 #define CLK_TOP_SYSPLL4_D4 15 macro
H A Dmediatek,mt8365-clk.h30 #define CLK_TOP_SYSPLL4_D4 20 macro
H A Dmt2712-clk.h49 #define CLK_TOP_SYSPLL4_D4 18 macro
H A Dmt2701-clk.h26 #define CLK_TOP_SYSPLL4_D4 16 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c418 FACTOR_FLAGS(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "main_h156m", 1, 4, 0),
H A Dclk-mt8173-topckgen.c497 FACTOR_FLAGS(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "main_h156m", 1, 4, 0),
H A Dclk-mt7622.c282 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "mainpll", 1, 28),
H A Dclk-mt7629.c390 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "mainpll", 1, 28),
H A Dclk-mt6797.c41 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "syspll_d7", 1, 4),
H A Dclk-mt2712.c57 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "syspll_d7", 1, 4),
H A Dclk-mt8365.c49 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "mainpll", 1, 28),
H A Dclk-mt6765.c98 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "syspll_d7", 1, 4),
H A Dclk-mt2701.c72 FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "syspll_d7", 1, 4),