| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6735-topckgen.h | 17 #define CLK_TOP_SYSPLL1_D8 10 macro
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| H A D | mt7629-clk.h | 37 #define CLK_TOP_SYSPLL1_D8 27 macro
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| H A D | mt7622-clk.h | 33 #define CLK_TOP_SYSPLL1_D8 21 macro
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| H A D | mt6797-clk.h | 49 #define CLK_TOP_SYSPLL1_D8 39 macro
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| H A D | mediatek,mt6795-clk.h | 54 #define CLK_TOP_SYSPLL1_D8 43 macro
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| H A D | mt8173-clk.h | 56 #define CLK_TOP_SYSPLL1_D8 46 macro
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| H A D | mt6765-clk.h | 39 #define CLK_TOP_SYSPLL1_D8 4 macro
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| H A D | mediatek,mt8365-clk.h | 19 #define CLK_TOP_SYSPLL1_D8 9 macro
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| H A D | mt2712-clk.h | 39 #define CLK_TOP_SYSPLL1_D8 8 macro
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| H A D | mt2701-clk.h | 18 #define CLK_TOP_SYSPLL1_D8 8 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-topckgen.c | 77 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "mainpll", 1, 8),
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| H A D | clk-mt6795-topckgen.c | 408 FACTOR_FLAGS(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "main_h546m", 1, 8, 0),
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| H A D | clk-mt8173-topckgen.c | 487 FACTOR_FLAGS(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "main_h546m", 1, 8, 0),
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| H A D | clk-mt7622.c | 275 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "mainpll", 1, 16),
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| H A D | clk-mt7629.c | 380 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "mainpll", 1, 16),
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| H A D | clk-mt6797.c | 29 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
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| H A D | clk-mt2712.c | 47 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
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| H A D | clk-mt8365.c | 38 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "mainpll", 1, 16),
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| H A D | clk-mt6765.c | 87 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
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| H A D | clk-mt2701.c | 64 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
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