Searched refs:CLK_TOP_SPI5_BCLK (Results 1 – 2 of 2) sorted by relevance
41 #define CLK_TOP_SPI5_BCLK 28 macro
744 MUX_GATE_HWV_FENC_CLR_SET_UPD(CLK_TOP_SPI5_BCLK, "spi5_b", spi_b_parents,