Searched refs:CLK_TOP_SPI4_BCLK (Results 1 – 2 of 2) sorted by relevance
40 #define CLK_TOP_SPI4_BCLK 27 macro
739 MUX_GATE_HWV_FENC_CLR_SET_UPD(CLK_TOP_SPI4_BCLK, "spi4_b", spi_b_parents,