Searched refs:CLK_TOP_MSDCPLL_CK (Results 1 – 7 of 7) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | mt6797-clk.h | 101 #define CLK_TOP_MSDCPLL_CK 91 macro
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| H A D | mt6779-clk.h | 96 #define CLK_TOP_MSDCPLL_CK 86 macro
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| H A D | mt8183-clk.h | 121 #define CLK_TOP_MSDCPLL_CK 85 macro
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8183-evb.dts | 117 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6797.c | 81 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),
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| H A D | clk-mt8183.c | 94 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),
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| H A D | clk-mt6779.c | 96 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),
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