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Searched refs:CLK_TOP_MSDC30_2 (Results 1 – 6 of 6) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6779-clk.h21 #define CLK_TOP_MSDC30_2 11 macro
H A Dmediatek,mt8188-clk.h40 #define CLK_TOP_MSDC30_2 29 macro
H A Dmt8195-clk.h44 #define CLK_TOP_MSDC30_2 32 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-topckgen.c1024 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_2, "top_msdc30_2",
H A Dclk-mt8195-topckgen.c951 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_2, "top_msdc30_2",
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1420 clocks = <&topckgen CLK_TOP_MSDC30_2>,
1424 assigned-clocks = <&topckgen CLK_TOP_MSDC30_2>;