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Searched refs:CLK_TOP_MSDC30_1 (Results 1 – 10 of 10) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h72 #define CLK_TOP_MSDC30_1 62 macro
H A Dmt6765-clk.h96 #define CLK_TOP_MSDC30_1 61 macro
H A Dmt6779-clk.h20 #define CLK_TOP_MSDC30_1 10 macro
H A Dmt8186-clk.h33 #define CLK_TOP_MSDC30_1 14 macro
H A Dmediatek,mt8196-clock.h44 #define CLK_TOP_MSDC30_1 31 macro
H A Dmt8195-clk.h43 #define CLK_TOP_MSDC30_1 31 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c538 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
H A Dclk-mt8188-topckgen.c1025 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
H A Dclk-mt8195-topckgen.c948 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC30_1, "top_msdc30_1",
H A Dclk-mt8196-topckgen.c760 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_MSDC30_1, "msdc30_1", msdc30_parents,