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Searched refs:CLK_TOP_DPSW_CMP_26M (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8196-clock.h70 #define CLK_TOP_DPSW_CMP_26M 57 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8196-topckgen.c878 MUX_CLR_SET_UPD(CLK_TOP_DPSW_CMP_26M, "dpsw_cmp_26m",