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Searched refs:CLK_TOP_AUD_2 (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6779-clk.h31 #define CLK_TOP_AUD_2 21 macro
H A Dmt8186-clk.h37 #define CLK_TOP_AUD_2 18 macro
H A Dmediatek,mt8196-clock.h57 #define CLK_TOP_AUD_2 44 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c547 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_2, "top_aud_2",
H A Dclk-mt8196-topckgen.c817 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_AUD_2, "aud_2", aud_2_parents,