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Searched refs:CLK_TOP_AUD_1 (Results 1 – 6 of 6) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h98 #define CLK_TOP_AUD_1 63 macro
H A Dmt6779-clk.h30 #define CLK_TOP_AUD_1 20 macro
H A Dmt8186-clk.h36 #define CLK_TOP_AUD_1 17 macro
H A Dmediatek,mt8196-clock.h56 #define CLK_TOP_AUD_1 43 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c545 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1, "top_aud_1",
H A Dclk-mt8196-topckgen.c813 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_AUD_1, "aud_1", aud_1_parents,