Searched refs:CLK_TOP_AUD_1 (Results 1 – 7 of 7) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 98 #define CLK_TOP_AUD_1 63 macro
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| H A D | mt6779-clk.h | 30 #define CLK_TOP_AUD_1 20 macro
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| H A D | mt8186-clk.h | 36 #define CLK_TOP_AUD_1 17 macro
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| H A D | mediatek,mt8196-clock.h | 56 #define CLK_TOP_AUD_1 43 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8186-topckgen.c | 545 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_1, "top_aud_1",
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| H A D | clk-mt8196-topckgen.c | 813 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_AUD_1, "aud_1", aud_1_parents,
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| H A D | clk-mt6765.c | 145 FACTOR(CLK_TOP_AUD_1, "aud_1_ck", "aud_1_sel", 1, 1),
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