Searched refs:CLK_TOP_APLL_I2SOUT4 (Results 1 – 2 of 2) sorted by relevance
89 #define CLK_TOP_APLL_I2SOUT4 76 macro
942 MUX_DIV_GATE(CLK_TOP_APLL_I2SOUT4, "apll_i2sout4_m", apll_m_parents,