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Searched refs:CLK_TOP_AES_UFSFDE (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8196-clock.h54 #define CLK_TOP_AES_UFSFDE 41 macro
H A Dmt8195-clk.h72 #define CLK_TOP_AES_UFSFDE 60 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8195-topckgen.c1019 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_UFSFDE, "top_aes_ufsfde",
H A Dclk-mt8196-topckgen.c804 MUX_GATE_FENC_CLR_SET_UPD(CLK_TOP_AES_UFSFDE, "aes_ufsfde", aes_ufsfde_parents,