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Searched refs:CLK_PERI_PWM6 (Results 1 – 14 of 14) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-pericfg.h13 #define CLK_PERI_PWM6 7 macro
H A Dmt8135-clk.h163 #define CLK_PERI_PWM6 25 macro
H A Dmediatek,mt6795-clk.h182 #define CLK_PERI_PWM6 7 macro
H A Dmt8173-clk.h201 #define CLK_PERI_PWM6 8 macro
H A Dmt2712-clk.h247 #define CLK_PERI_PWM6 8 macro
H A Dmt2701-clk.h229 #define CLK_PERI_PWM6 8 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c58 GATE_PERI0(CLK_PERI_PWM6, "peri_pwm6", "axi_sel", 7),
H A Dclk-mt6795-pericfg.c47 GATE_PERI(CLK_PERI_PWM6, "peri_pwm6", "axi_sel", 7),
H A Dclk-mt6735-pericfg.c37 GATE_MTK(CLK_PERI_PWM6, "pwm6", "axi_sel", &peri_cg_regs, 7, &mtk_clk_gate_ops_setclr),
H A Dclk-mt8135.c474 GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axi_sel", 7),
H A Dclk-mt2712.c893 GATE_PERI0(CLK_PERI_PWM6, "per_pwm6", "pwm_sel", 8),
H A Dclk-mt2701.c848 GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axisel_d4", 7),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi490 <&pericfg CLK_PERI_PWM6>,
H A Dmt6795.dtsi611 <&pericfg CLK_PERI_PWM6>,