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Searched refs:CLK_PERI_MSDC30_1 (Results 1 – 15 of 15) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-pericfg.h20 #define CLK_PERI_MSDC30_1 14 macro
H A Dmt8135-clk.h155 #define CLK_PERI_MSDC30_1 17 macro
H A Dmediatek,mt6795-clk.h189 #define CLK_PERI_MSDC30_1 14 macro
H A Dmt8173-clk.h208 #define CLK_PERI_MSDC30_1 15 macro
H A Dmt2712-clk.h252 #define CLK_PERI_MSDC30_1 13 macro
H A Dmt2701-clk.h236 #define CLK_PERI_MSDC30_1 15 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c65 GATE_PERI0(CLK_PERI_MSDC30_1, "peri_msdc30_1", "msdc30_1_sel", 14),
H A Dclk-mt6795-pericfg.c54 GATE_PERI(CLK_PERI_MSDC30_1, "peri_msdc30_1", "msdc30_1_sel", 14),
H A Dclk-mt6735-pericfg.c44 …GATE_MTK(CLK_PERI_MSDC30_1, "msdc30_1", "msdc30_1_sel", &peri_cg_regs, 14, &mtk_clk_gate_ops_setcl…
H A Dclk-mt8135.c466 GATE_PERI0(CLK_PERI_MSDC30_1, "msdc30_1_ck", "msdc30_2_sel", 15),
H A Dclk-mt2712.c898 GATE_PERI0(CLK_PERI_MSDC30_1, "per_msdc30_1", "msdc30_1_sel", 15),
H A Dclk-mt2701.c841 GATE_PERI0(CLK_PERI_MSDC30_1, "msdc30_1_ck", "msdc30_1_sel", 14),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi779 clocks = <&pericfg CLK_PERI_MSDC30_1>,
H A Dmt6795.dtsi693 clocks = <&pericfg CLK_PERI_MSDC30_1>,
H A Dmt8173.dtsi906 clocks = <&pericfg CLK_PERI_MSDC30_1>,