Home
last modified time | relevance | path

Searched refs:CLK_PERI_AUXADC (Results 1 – 15 of 15) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-pericfg.h33 #define CLK_PERI_AUXADC 27 macro
H A Dmt8135-clk.h177 #define CLK_PERI_AUXADC 39 macro
H A Dmediatek,mt6795-clk.h203 #define CLK_PERI_AUXADC 28 macro
H A Dmt8173-clk.h222 #define CLK_PERI_AUXADC 29 macro
H A Dmt2712-clk.h264 #define CLK_PERI_AUXADC 25 macro
H A Dmt2701-clk.h250 #define CLK_PERI_AUXADC 29 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c79 GATE_PERI0(CLK_PERI_AUXADC, "peri_auxadc", "clk26m", 28),
H A Dclk-mt6795-pericfg.c68 GATE_PERI(CLK_PERI_AUXADC, "peri_auxadc", "clk26m", 28),
H A Dclk-mt6735-pericfg.c57 GATE_MTK(CLK_PERI_AUXADC, "auxadc", "axi_sel", &peri_cg_regs, 27, &mtk_clk_gate_ops_setclr),
H A Dclk-mt8135.c489 GATE_PERI1(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 2),
H A Dclk-mt2712.c910 GATE_PERI0(CLK_PERI_AUXADC, "per_auxadc", "ltepll_fs26m", 29),
H A Dclk-mt2701.c827 GATE_PERI0(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 28),
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi248 clocks = <&pericfg CLK_PERI_AUXADC>;
354 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi671 clocks = <&pericfg CLK_PERI_AUXADC>;
782 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
H A Dmt2712e.dtsi419 clocks = <&pericfg CLK_PERI_AUXADC>;