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Searched refs:CLK_CFG_5_CLR (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6735-topckgen.c31 #define CLK_CFG_5_CLR 0x98 macro
355 …LK_TOP_ATB_SEL, "atb_sel", atb_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 0, 2, 7, 0, 0…
356 …TOP_DPI0_SEL, "dpi0_sel", dpi0_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 8, 3, 15, 0, …
357 …TOP_SCAM_SEL, "scam_sel", scam_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 16, 2, 23, 0,…
358 …G13M_SEL, "mfg13m_sel", mfg13m_sel_parents, CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 24, 1, 31, 0,…
H A Dclk-mt6765.c58 #define CLK_CFG_5_CLR 0x98 macro
436 CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 0, 2, 7,
439 CLK_CFG_5, CLK_CFG_5_SET, CLK_CFG_5_CLR, 8, 2, 15,
443 CLK_CFG_5_CLR, 16, 1, 23, CLK_CFG_UPDATE, 22),
445 CLK_CFG_5_SET, CLK_CFG_5_CLR, 24, 1, 31,