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Searched refs:CLK_CFG_2_CLR (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6735-topckgen.c22 #define CLK_CFG_2_CLR 0x68 macro
343 …TOP_UART_SEL, "uart_sel", uart_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 0, 1, 7, 0, 0…
344 …LK_TOP_SPI_SEL, "spi_sel", spi_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 8, 3, 15, 0, …
345 …_USB20_SEL, "usb20_sel", usb20_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 2, 23, 0,…
346 …_SEL, "msdc50_0_sel", msdc50_0_sel_parents, CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 24, 3, 31, 0,…
H A Dclk-mt6765.c49 #define CLK_CFG_2_CLR 0x68 macro
398 CLK_CFG_2_CLR, 0, 3, 7, CLK_CFG_UPDATE, 8),
400 CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR,
403 CLK_CFG_2, CLK_CFG_2_SET, CLK_CFG_2_CLR, 16, 1, 23,
406 CLK_CFG_2_SET, CLK_CFG_2_CLR, 24, 2, 31,