Searched refs:CLK_CFG_1_SET (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-topckgen.c | 18 #define CLK_CFG_1_SET 0x54 macro
339 …MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CF…
340 …MUX_GATE_CLR_SET_UPD(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK…
341 …MUX_GATE_CLR_SET_UPD(CLK_TOP_MFG_SEL, "mfg_sel", mfg_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, CLK_CF…
342 …MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_sel_parents, CLK_CFG_1, CLK_CFG_1_SET, …
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| H A D | clk-mt8196-topckgen.c | 28 #define CLK_CFG_1_SET 0x0024 macro
635 shared_axi_parents, CLK_CFG_1, CLK_CFG_1_SET,
639 shared_axi_parents, CLK_CFG_1, CLK_CFG_1_SET,
643 shared_sub_parents, CLK_CFG_1, CLK_CFG_1_SET,
647 shared_sub_parents, CLK_CFG_1, CLK_CFG_1_SET,
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| H A D | clk-mt6765.c | 44 #define CLK_CFG_1_SET 0x54 macro
383 CLK_CFG_1_SET, CLK_CFG_1_CLR, 0, 2, 7,
386 CLK_CFG_1_SET, CLK_CFG_1_CLR, 8, 2, 15,
389 camtg_parents, CLK_CFG_1, CLK_CFG_1_SET,
392 CLK_CFG_1, CLK_CFG_1_SET, CLK_CFG_1_CLR,
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